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SN74BCT125ANSR PDF预览

SN74BCT125ANSR

更新时间： 2024-11-25 22:27:23
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
14页 489K
描述
QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

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SN74BCT125ANSR 数据手册

 浏览型号SN74BCT125ANSR的Datasheet PDF文件第2页浏览型号SN74BCT125ANSR的Datasheet PDF文件第3页浏览型号SN74BCT125ANSR的Datasheet PDF文件第4页浏览型号SN74BCT125ANSR的Datasheet PDF文件第5页浏览型号SN74BCT125ANSR的Datasheet PDF文件第6页浏览型号SN74BCT125ANSR的Datasheet PDF文件第7页 
SN54BCT125A, SN74BCT125A  
QUADRUPLE BUS BUFFER GATES  
WITH 3-STATE OUTPUTS  
SCBS032F – SEPTEMBER 1988 – REVISED MARCH 2003  
Operating Voltage Range of 4.5 V to 5.5 V  
State-of-the-Art BiCMOS Design  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
Significantly Reduces I  
CCZ  
SN54BCT125A . . . J OR W PACKAGE  
SN74BCT125A . . . D, N, OR NS PACKAGE  
(TOP VIEW)  
SN54BCT125A . . . FK PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1OE  
1A  
1Y  
2OE  
2A  
2Y  
V
CC  
4OE  
3
2
1
20 19  
18  
4A  
4
5
6
7
8
1Y  
NC  
4A  
4Y  
3OE  
3A  
3Y  
NC  
4Y  
17  
16  
15  
14  
2OE  
NC  
NC  
3OE  
2A  
9 10 11 12 13  
8
GND  
NC – No internal connection  
description/ordering information  
The ’BCT125A bus buffers feature independent line drivers with 3-state outputs. Each output is disabled when  
the associated output-enable (OE) input is high.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – N  
SOIC – D  
Tube  
SN74BCT125AN  
SN74BCT125AD  
SN74BCT125ADR  
SN74BCT125ANSR  
SNJ54BCT125AJ  
SNJ54BCT125AW  
SNJ54BCT125AFK  
SN74BCT125AN  
Tube  
0°C to 70°C  
BCT125A  
Tape and reel  
Tape and reel  
Tube  
SOP – NS  
CDIP – J  
BCT125A  
SNJ54BCT125AJ  
SNJ54BCT125AW  
SNJ54BCT125AFK  
–55°C to 125°C  
CFP – W  
LCCC – FK  
Tube  
Tube  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...14

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SN74BCT125ANSR 替代型号

型号 品牌 替代类型 描述 数据表
SN74BCT125ADG4 TI

完全替代

 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN74BCT125AN TI

完全替代

 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN74BCT125AD TI

完全替代

 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

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