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SN74AUP1G79DBVRG4 PDF预览

SN74AUP1G79DBVRG4

更新时间: 2024-02-01 10:03:18
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
24页 984K
描述
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SN74AUP1G79DBVRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOT-23
包装说明:LSSOP, TSOP5/6,.11,37针数:5
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:5.18系列:AUP/ULP/V
JESD-30 代码:R-PDSO-G5JESD-609代码:e4
长度:2.9 mm负载电容(CL):30 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:220000000 Hz
最大I(ol):0.004 A湿度敏感等级:1
位数:1功能数量:1
端子数量:5最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:LSSOP封装等效代码:TSOP5/6,.11,37
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:1.2/3.3 V最大电源电流(ICC):0.0009 mA
Prop。Delay @ Nom-Sup:24 ns传播延迟(tpd):24 ns
认证状态:Not Qualified座面最大高度:1.45 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.2 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.95 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:1.6 mm
最小 fmax:260 MHzBase Number Matches:1

SN74AUP1G79DBVRG4 数据手册

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SN74AUP1G79  
www.ti.com  
SCES592G JULY 2004REVISED MAY 2010  
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP  
Check for Samples: SN74AUP1G79  
1
FEATURES  
Available in the Texas Instruments NanoStar™  
Package  
Wide Operating VCC Range of 0.8 V to 3.6 V  
Optimized for 3.3-V Operation  
Low Static-Power Consumption:  
ICC = 0.9 mA Max  
3.6-V I/O Tolerant to Support Mixed-Mode  
Signal Operation  
Low Dynamic-Power Consumption:  
Cpd = 3 pF Typ at 3.3 V  
tpd = 4 ns Max at 3.3 V  
Suitable for Point-to-Point Applications  
Low Input Capacitance:  
Ci = 1.5 pF Typ  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Low Noise: Overshoot and Undershoot  
<10% of VCC  
ESD Performance Tested Per JESD 22  
2000-V Human-Body Model  
(A114-B, Class II)  
Ioff Supports Partial Power-Down-Mode  
Operation  
1000-V Charged-Device Model (C101)  
Input Hysteresis Allows Slow Input Transition  
and Better Switching Noise Immunity at the  
Input (Vhys = 250 mV Typ at 3.3 V)  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
DRL PACKAGE  
(TOP VIEW)  
1
2
3
5
D
CLK  
GND  
VCC  
D
CLK  
GND  
VCC  
1
2
3
5
1
2
3
5
D
CLK  
GND  
VCC  
4
Q
4
Q
4
Q
DRY PACKAGE  
(TOP VIEW)  
DSF PACKAGE  
(TOP VIEW)  
YFP PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(TOP VIEW)  
1
2
3
6
5
4
1
2
3
6
5
4
A2  
A2  
A1  
1
2
6
5
4
A1  
1
2
5
D
CLK  
VCC  
VCC  
N.C.  
Q
D
D
VCC  
N.C.  
Q
VCC  
Q
D
CLK B1  
B2  
C2  
CLK B1  
N.C.  
Q
CLK  
C1 3  
C1 3  
4
C2  
GND  
GND  
GND  
GND  
N.C. – No internal connection  
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable  
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range  
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see  
Figure 1 and Figure 2).  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2010, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
 

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低功耗单路正边沿触发式 D 型触发器 | DPW | 5 | -40 to 85