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SN74AS4374B PDF预览

SN74AS4374B

更新时间: 2024-11-13 22:53:55
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
5页 79K
描述
OCTAL EDGE-TRIGGERED D-TYPE DUAL-RANK FLIP-FLOP WITH 3-STATE OUTPUTS

SN74AS4374B 数据手册

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SN74AS4374B  
OCTAL EDGE-TRIGGERED D-TYPE DUAL-RANK FLIP-FLOP  
WITH 3-STATE OUTPUTS  
SDAS109D – APRIL 1989 – REVISED JANUARY 1995  
DW OR N PACKAGE  
3-State Outputs Drive Bus Lines Directly  
Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic (N) 300-mil DIPs  
(TOP VIEW)  
1Q  
2Q  
3Q  
4Q  
GND  
5Q  
6Q  
7Q  
8Q  
OE  
1D  
2D  
3D  
4D  
V
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
description  
This 8-bit flip-flop features 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. It is particularly  
suitable for implementing buffer registers, I/O  
ports, bidirectional bus drivers, and working  
registers.  
CC  
5D  
6D  
13 7D  
12 8D  
11  
CLK  
The eight flip-flops of the SN74AS4374B are  
edge-triggered D-type flip-flops. On the second  
positive transition of the clock (CLK) input, the Q  
outputs are set to the logic levels set up at the data  
(D) inputs.  
The output-enable (OE) input does not affect internal operations of the flip-flops. Previously stored data can be  
retained or new data can be entered while the outputs are in the high-impedance state.  
The SN74AS4374B is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
D
OE  
H
L
CLK  
X
X
Z
L
L
H
X
L
H
L
L
Q
0
Data presented at the D inputs require  
two clock cycles to appear at the Q  
outputs.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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