5秒后页面跳转
SN74ALVCH162820GR PDF预览

SN74ALVCH162820GR

更新时间: 2024-11-05 20:04:31
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
14页 329K
描述
ALVC/VCX/A SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSSOP-56

SN74ALVCH162820GR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP56,.3,20
针数:56Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:7.45
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G56
长度:14 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:150000000 Hz
最大I(ol):0.012 A位数:10
功能数量:1端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 VProp。Delay @ Nom-Sup:5.4 ns
传播延迟(tpd):6.4 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:6.1 mm
Base Number Matches:1

SN74ALVCH162820GR 数据手册

 浏览型号SN74ALVCH162820GR的Datasheet PDF文件第2页浏览型号SN74ALVCH162820GR的Datasheet PDF文件第3页浏览型号SN74ALVCH162820GR的Datasheet PDF文件第4页浏览型号SN74ALVCH162820GR的Datasheet PDF文件第5页浏览型号SN74ALVCH162820GR的Datasheet PDF文件第6页浏览型号SN74ALVCH162820GR的Datasheet PDF文件第7页 
SN74ALVCH162820  
3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS  
AND 3-STATE OUTPUTS  
www.ti.com  
SCES012HJULY 1995REVISED SEPTEMBER 2004  
FEATURES  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments Widebus™  
Family  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
1OE  
1Q1  
1Q2  
GND  
2Q1  
2Q2  
CLK  
D1  
EPIC™ (Enhanced-Performance Implanted  
CMOS) Submicron Process  
2
3
NC  
GND  
D2  
Output Ports Have Equivalent 26-Series  
Resistors, So No External Resistors Are  
Required  
4
5
6
NC  
ESD Protection Exceeds 2000 V Per  
7
V
CC  
V
CC  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
8
3Q1  
3Q2  
4Q1  
GND  
4Q2  
5Q1  
5Q2  
6Q1  
6Q2  
7Q1  
GND  
7Q2  
8Q1  
8Q2  
D3  
NC  
D4  
GND  
NC  
D5  
9
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
Package Options Include Plastic Shrink  
Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
NC  
D6  
NC  
D7  
GND  
NC  
D8  
NOTE: For tape-and-reel order entry, the DGGR package is  
abbreviated to GR.  
DESCRIPTION  
NC  
This 10-bit flip-flop is designed for 1.65-V to 3.6-V  
VCC operation.  
V
CC  
V
CC  
9Q1  
9Q2  
D9  
NC  
The SN74ALVCH162820 flip-flops are edge-triggered  
D-type flip-flops. On the positive transition of the  
clock (CLK) input, the device provides true data at the  
Q outputs.  
GND  
10Q1  
10Q2  
2OE  
GND  
D10  
NC  
A buffered output-enable (OE) input can be used to  
place the ten outputs in either a normal logic state  
(high or low logic levels) or the high-impedance state.  
In the high-impedance state, the outputs neither load  
nor drive the bus lines significantly. The  
high-impedance state and increased drive provide the  
capability to drive bus lines without need for interface  
or pullup components.  
NC  
NC − No internal connection  
OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
The outputs, which are designed to sink up to 12 mA, include equivalent 26-resistors to reduce overshoot and  
undershoot.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH162820 is characterized for operation from -40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, EPIC are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74ALVCH162820GR 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALVCH162820DGG TI

功能相似

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

与SN74ALVCH162820GR相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVCH162827 TI

获取价格

20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162827_08 TI

获取价格

20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162827DGG TI

获取价格

20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162827DGGR TI

获取价格

20-Bit Buffer/Driver With 3-State Outputs 56-TSSOP -40 to 85
SN74ALVCH162827DGGR ROCHESTER

获取价格

ALVC/VCX/A SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56, PLASTIC, TSSOP-56
SN74ALVCH162827DGV TI

获取价格

20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162827DGVR TI

获取价格

ALVC/VCX/A SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56, PLASTIC, TVSOP-56
SN74ALVCH162827DL TI

获取价格

20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162827DL ROCHESTER

获取价格

ALVC/VCX/A SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, SSOP-56
SN74ALVCH162827DLR TI

获取价格

20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS