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SN74ALVCH162827

更新时间: 2024-11-04 23:09:43
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德州仪器 - TI 驱动器输出元件
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10页 153K
描述
20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

SN74ALVCH162827 数据手册

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SN74ALVCH162827  
20-BIT BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES013HJULY 1995REVISED AUGUST 2004  
FEATURES  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments Widebus™  
Family  
1
56  
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32  
31  
30  
29  
1OE1  
1Y1  
1Y2  
GND  
1Y3  
1OE2  
1A1  
1A2  
GND  
1A3  
Output Ports Have Equivalent 26-Series  
Resistors, So No External Resistors Are  
Required  
2
3
4
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
5
6
1Y4  
1A4  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
7
V
CC  
V
CC  
8
1Y  
1Y6  
1Y7  
GND  
1Y8  
1Y9  
1Y10  
2Y1  
2Y2  
2Y3  
GND  
2Y4  
2Y5  
2Y6  
1A5  
1A6  
1A7  
GND  
1A8  
1A9  
1A10  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
ESD Protection Exceeds JESD 22  
- 2000-V Human-Body Model (A114-A)  
- 200-V Machine Model (A115-A)  
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28  
- 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This 20-bit noninverting buffer/driver is designed for  
1.65-V to 3.6-V VCC operation.  
The SN74ALVCH162827 is composed of two 10-bit  
sections with separate output-enable signals. For  
either 10-bit buffer section, the two output-enable  
(1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must  
both be low for the corresponding Y outputs to be  
active. If either output-enable input is high, the  
outputs of that 10-bit buffer section are in the  
high-impedance state.  
V
CC  
V
CC  
2Y7  
2Y8  
GND  
2Y9  
2Y10  
2OE1  
2A7  
2A8  
GND  
2A9  
2A10  
2OE2  
The outputs, which are designed to sink up to 12 mA,  
include equivalent 26-resistors to reduce overshoot  
and undershoot.  
To ensure the high-impedance state during power up  
or power down, OE should be tied to VCC through a  
pullup resistor; the minimum value of the resistor is  
determined by the current-sinking capability of the  
driver.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVCH162827DL  
TOP-SIDE MARKING  
Tube  
SSOP - DL  
ALVCH162827  
Tape and reel  
SN74ALVCH162827DLR  
SN74ALVCH162827GR  
-40°C to 85°C  
TSSOP - DGG  
TVSOP - DGV  
Tape and reel  
Tape and reel  
ALVCH162827  
VH2827  
SN74ALVCH162827VR  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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