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SN74ALVCH162374DGG

更新时间： 2024-11-17 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
9页 127K
描述
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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SN74ALVCH162374DGG 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP,
针数：48Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.43
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G48
JESD-609代码：e4长度：12.5 mm
逻辑集成电路类型：BUS DRIVER湿度敏感等级：1
位数：8功能数量：2
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE WITH SERIES RESISTOR输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260传播延迟（tpd）：5.4 ns
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：NICKEL PALLADIUM GOLD端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6.1 mm
Base Number Matches：1

SN74ALVCH162374DGG 数据手册

 浏览型号SN74ALVCH162374DGG的Datasheet PDF文件第2页浏览型号SN74ALVCH162374DGG的Datasheet PDF文件第3页浏览型号SN74ALVCH162374DGG的Datasheet PDF文件第4页浏览型号SN74ALVCH162374DGG的Datasheet PDF文件第5页浏览型号SN74ALVCH162374DGG的Datasheet PDF文件第6页浏览型号SN74ALVCH162374DGG的Datasheet PDF文件第7页 
SN74ALVCH162374  
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH 3-STATE OUTPUTS  
SCES092C – JANUARY 1997 – REVISED JUNE 1999  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1CLK  
1D1  
1D2  
GND  
1D3  
1D4  
2
Output Ports Have Equivalent 26-Ω Series  
Resistors, So No External Resistors Are  
Required  
3
4
5
ESD Protection Exceeds 2000 V Per  
MIL-STD-833, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
6
7
V
V
CC  
CC  
8
1Q5  
1Q6  
GND  
1Q7  
1Q8  
2Q1  
2Q2  
GND  
2Q3  
2Q4  
1D5  
1D6  
GND  
1D7  
1D8  
2D1  
2D2  
GND  
2D3  
2D4  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
NOTE: For tape and reel order entry:  
The DGGR package is abbreviated to GR.  
V
V
CC  
CC  
2Q5  
2Q6  
GND  
2Q7  
2Q8  
2OE  
2D5  
2D6  
GND  
2D7  
2D8  
2CLK  
description  
This 16-bit edge-triggered D-type flip-flop is  
designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74ALVCH162374 is particularly suitable  
for implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers. It  
can be used as two 8-bit flip-flops or one 16-bit  
flip-flop. On the positive transition of the clock  
(CLK) input, the Q outputs of the flip-flop take on  
the logic levels set up at the data (D) inputs.  
The output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low  
logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines  
without need for interface or pullup components. OE does not affect internal operations of the flip-flop. Old data  
can be retained or new data can be entered while the outputs are in the high-impedance state.  
The outputs, which are designed to sink up to 12 mA, include equivalent 26-Ω resistors to reduce overshoot  
and undershoot.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH162374 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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SN74ALVCH162374DGG 替代型号

型号 品牌 替代类型 描述 数据表
74VCX162374MTDX FAIRCHILD

功能相似

 16-Bit D-Type Flip-Flop
IDT74ALVCH162374PA IDT

功能相似

 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIPFLOP WITH 3-STATE OUTPUTS AND BUS-HOLD
74ALVCH162374T FAIRCHILD

功能相似

 Low Voltage 16-Bit D-Type Flip-Flop with Bush

与SN74ALVCH162374DGG相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVCH162374DGGR TI

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 		暂无描述
SN74ALVCH162374DL TI

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 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH162374DLR TI

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 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH162374GR TI

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 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16240 TI

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 		16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16240_14 TI

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 		16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162409DGGR TI

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 		ALVC/VCX/A SERIES, 9-BIT EXCHANGER, TRUE OUTPUT, PDSO56, TSSOP-56
SN74ALVCH162409DL ROCHESTER

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 		ALVC/VCX/A SERIES, 9-BIT EXCHANGER, TRUE OUTPUT, PDSO56, 0.300 INCH, PLASTIC, SSOP-56
SN74ALVCH162409DLR ROCHESTER

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 		ALVC/VCX/A SERIES, 9-BIT EXCHANGER, TRUE OUTPUT, PDSO56, 0.300 INCH, PLASTIC, SSOP-56
SN74ALVCH16240DGG TI

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 		16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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