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SN74ALVCH16244GRDR PDF预览

SN74ALVCH16244GRDR

更新时间: 2024-09-10 09:15:39
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
19页 601K
描述
16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

SN74ALVCH16244GRDR 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:PLASTIC, LFBGA-54针数:54
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.54Is Samacsys:N
系列:ALVC/VCX/AJESD-30 代码:R-PBGA-B54
长度:8 mm逻辑集成电路类型:BUS DRIVER
位数:4功能数量:4
端口数量:2端子数量:54
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装形状:RECTANGULAR封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH
传播延迟(tpd):3.7 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
宽度:5.5 mmBase Number Matches:1

SN74ALVCH16244GRDR 数据手册

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SN74ALVCH16244  
16-BIT BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES014KJULY 1995REVISED OCTOBER 2005  
FEATURES  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments Widebus™  
Family  
1
48  
47  
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39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
Operates From 1.65 V to 3.6 V  
Max tpd of 3 ns at 3.3 V  
2
3
±24-mA Output Drive at 3.3 V  
4
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
5
6
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
7
V
CC  
V
CC  
8
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
2A1  
2A2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
3A3  
3A4  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
DESCRIPTION/ORDERING INFORMATION  
This 16-bit buffer/driver is designed for 1.65-V to  
3.6-V VCC operation.  
The SN74ALVCH16244 is designed specifically to  
improve the performance and density of 3-state  
memory address drivers, clock drivers, and  
bus-oriented receivers and transmitters.  
V
CC  
V
CC  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
4OE  
4A1  
4A2  
GND  
4A3  
4A4  
3OE  
The device can be used as four 4-bit buffers, two  
8-bit buffers, or one 16-bit buffer. It provides true  
outputs and symmetrical active-low output-enable  
(OE) inputs.  
To ensure the high-impedance state during power up  
or power down, OE should be tied to VCC through a  
pullup resistor; the minimum value of the resistor is  
determined by the current-sinking capability of the  
driver.  
blank  
blank  
blank  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVCH16244GRDR  
SN74ALVCH16244ZRDR  
SN74ALVCH16244DL  
TOP-SIDE MARKING  
FBGA – GRD  
Tape and reel  
VH244  
FBGA – ZRD (Pb-free)  
Tube  
SSOP – DL  
ALVCH16244  
ALVCH16244  
VH244  
Tape and reel  
SN74ALVCH16244DLR  
SN74ALVCH16244DGGR  
74ALVCH16244DGGRE4  
SN74ALVCH16244DGVR  
74ALVCH16244DGVRE4  
SN74ALVCH16244KR  
–40°C to 85°C  
TSSOP – DGG  
TVSOP – DGV  
Tape and reel  
Tape and reel  
Tape and reel  
VFBGA – GQL  
VH244  
VFBGA – ZQL (Pb-free)  
74ALVCH16244ZQLR  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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