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SN74ALVCH16244DGV

更新时间： 2024-09-09 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
9页 140K
描述
16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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SN74ALVCH16244DGV 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：TSSOP,针数：48
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.37系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G48长度：9.7 mm
逻辑集成电路类型：BUS DRIVER位数：4
功能数量：4端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟（tpd）：3.7 ns
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.4 mm
端子位置：DUAL宽度：4.4 mm
Base Number Matches：1

SN74ALVCH16244DGV 数据手册

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SN74ALVCH16244  
16-BIT BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
SCES014E – JULY 1995 – REVISED FEBRUARY 1999  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1
2
3
4
5
6
7
8
9
48  
47 1A1  
46 1A2  
45 GND  
44 1A3  
43 1A4  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
V
42  
V
CC  
CC  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
2Y1  
2Y2  
41 2A1  
40 2A2  
39 GND  
38 2A3  
37 2A4  
36 3A1  
35 3A2  
34 GND  
33 3A3  
32 3A4  
GND 10  
2Y3 11  
2Y4 12  
3Y1 13  
3Y2 14  
GND 15  
3Y3 16  
3Y4 17  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages  
description  
This 16-bit buffer/driver is designed for 1.65-V to  
3.6-V V operation.  
V
18  
31  
V
CC  
CC  
CC  
4Y1 19  
4Y2 20  
GND 21  
4Y3 22  
4Y4 23  
4OE 24  
30 4A1  
29 4A2  
28 GND  
27 4A3  
26 4A4  
25 3OE  
The SN74ALVCH16244 is designed specifically  
to improve the performance and density of 3-state  
memory address drivers, clock drivers, and  
bus-oriented receivers and transmitters.  
The device can be used as four 4-bit buffers, two  
8-bit buffers, or one 16-bit buffer. It provides true  
outputs  
and  
symmetrical  
active-low  
output-enable (OE) inputs.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH16244 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each 4-bit buffer)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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