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SN74ALS29841NT

更新时间: 2024-11-18 22:50:27
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
6页 91K
描述
10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

SN74ALS29841NT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP24,.3针数:24
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.8
系列:ALSJESD-30 代码:R-PDIP-T24
长度:31.64 mm负载电容(CL):300 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.048 A
位数:10功能数量:1
端口数量:2端子数量:24
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP24,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
最大电源电流(ICC):85 mAProp。Delay @ Nom-Sup:23 ns
传播延迟(tpd):16 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

SN74ALS29841NT 数据手册

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SN74ALS29841  
10-BIT BUS-INTERFACE D-TYPE LATCH  
WITH 3-STATE OUTPUTS  
SDAS149A – JUNE 1988 – REVISED JANUARY 1995  
DW OR NT PACKAGE  
(TOP VIEW)  
3-State Buffer-Type Outputs Drive Bus  
Lines Directly  
Bus-Structured Pinout  
Provides Extra Bus-Driving Latches  
Necessary for Wider Address/Data Paths or  
Buses With Parity  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23 1Q  
22 2Q  
21 3Q  
20 4Q  
19 5Q  
18 6Q  
17 7Q  
16 8Q  
15 9Q  
14 10Q  
13 LE  
Buffered Control Inputs Reduce dc Loading  
Effects  
Power-Up High-Impedance State  
Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic (NT) 300-mil DIPs  
9D 10  
10D 11  
GND 12  
description  
This 10-bit latch features 3-state outputs designed  
specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for  
implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.  
The ten latches are transparent D-type latches. The SN74ALS29841 has noninverting data (D) inputs.  
A buffered output-enable (OE) input can place the ten outputs in either a normal logic state (high or low logic  
levels) or in a high-impedance state. The outputs also are in the high-impedance state during power-up and  
power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In  
the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance  
state and increased drive provide the capability to drive bus lines without interface or pullup components.  
OE does not affect the internal operation of the latches. Old data can be retained or new data can be entered  
while the outputs are off.  
The SN74ALS29841 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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