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SN74ALS29845

更新时间： 2024-11-23 11:58:39
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
7页 75K
描述
8-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS

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SN74ALS29845 数据手册

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SDAS150 − D3118 — JUNE 1988  
• 3-State Buffer-Type Outputs Drive Bus  
SN74ALS29845 . . . DW or NT Package  
(Top View)  
Lines Directly  
• Bus-Structured Pinout  
1
24  
23  
22  
21  
20  
19  
18  
OC1  
OC2  
1D  
V
CC  
• Provides Extra Bus Driving Latches  
2
OC3  
1Q  
2Q  
3Q  
4Q  
5Q  
3
Necessary For Wider Address/Data Paths  
or Buses With Parity  
4
2D  
5
3D  
• Buffered Control Inputs to Reduce DC  
6
4D  
7
5D  
Loading  
6D  
8
17 6Q  
16 7Q  
15 8Q  
14 PRE  
• Power-Up High-Impedance State  
7D  
9
8D  
10  
11  
12  
• Package Options Include Plastic “Small  
Outline” Packages, Plastic Chip Carriers,  
and Standard Plastic 300-mil DIPs  
CLR  
GND  
13  
C
• Dependable Texas Instruments Quality and  
SN74ALS29845 . . . FN Package  
(Top View)  
Reliability  
description  
4
3
2
1
28 27 26  
25  
2D  
3D  
4D  
NC  
5D  
2Q  
3Q  
4Q  
NC  
5Q  
6Q  
7Q  
5
6
7
8
9
These 8-bit latches feature three-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
24  
23  
22  
21  
20  
19  
6D 10  
11  
12 13 14 15 16 17 18  
7D  
The eight latches are transparent D-type. The  
′ALS29845 has noninverting data (D) inputs. The  
′ALS29846 has inverting D inputs. Since CLR and  
PRE are independent of the clock, taking the CLR  
input low will cause the eight Q outputs to go low.  
Taking the PRE input low will cause the eight Q  
outputs to go high. When both PRE and CLR are  
taken low, the outputs will follow the preset  
condition.  
SN74ALS29846 . . . DW or NT Package  
(Top View)  
1
24  
23  
22  
21  
20  
19  
OC1  
OC2  
1D  
V
CC  
2
OC3  
3
1Q  
4
2D  
2Q  
5
3D  
3Q  
6
4D  
4Q  
5D  
7
18 5Q  
17 6Q  
16 7Q  
15 8Q  
14 PRE  
The buffered output control inputs (OC1, OC2,  
and OC3) can be used to place the eight outputs  
in either a normal logic state (high or low levels) or  
a high-impedance state. The outputs are also in  
the high-impedance state during power-up and  
power-down conditions. The outputs remain in the  
high-impedance state while the device is  
powered-down. In the high-impedance state, the  
outputs neither load nor drive the bus lines  
significantly. The high-impedance state and  
increased drive provide the capability to drive the  
bus lines in a bus-organized system without need  
6D  
8
7D  
9
8D  
10  
11  
12  
CLR  
GND  
13  
C
SN74ALS29846 . . . FN Package  
(Top View)  
4
3
2
1
28 27 26  
25  
2D  
3D  
4D  
NC  
5D  
6D  
7D  
2Q  
3Q  
4Q  
NC  
5
6
24  
23  
22  
7
8
9
21 5Q  
20 6Q  
10  
11  
19  
7Q  
12 13 14 15 16 17 18  
NC — No internal connection  
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ꢥ
Copyright 1988, Texas Instruments Incorporated  
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ꢝꢧ ꢥ ꢧ ꢤ ꢤ ꢢ ꢠꢜ ꢪꢰ ꢜꢝ ꢥ ꢪꢦ ꢫꢧ ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢꢪ ꢪ ꢨꢢ ꢠ ꢢꢡ ꢧꢣꢧ ꢠ ꢤꢬ  
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1
1234567

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与SN74ALS29845相关器件

型号 品牌 获取价格 描述 数据表
SN74ALS29845FN TI

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 		ALS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PQCC28, PLASTIC, QCC-28
SN74ALS29845FNR TI

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 		ALS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PQCC28, PLASTIC, QCC-28
SN74ALS29845NT ROCHESTER

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 		Bus Driver, ALS Series, 1-Func, 8-Bit, True Output, TTL, PDIP24, 0.300 INCH, PLASTIC, DIP-
SN74ALS29845NT TI

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 		ALS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP24, 0.300 INCH, PLASTIC, DIP-24
SN74ALS29846 TI

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 		8-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74ALS29853DW TI

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 		IC,BUS TRANSCEIVER,SINGLE,8-BIT,ALS-TTL,SOP,24PIN,PLASTIC
SN74ALS29853NT TI

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 		IC,BUS TRANSCEIVER,SINGLE,8-BIT,ALS-TTL,DIP,24PIN,PLASTIC
SN74ALS29854 TI

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 		8-BIT TO 9-BIT PARITY BUS TRANSCEIVER
SN74ALS29854DW ROCHESTER

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 		ALS SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO24, PLASTIC, SO-24
SN74ALS29854DWE4 TI

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 		ALS SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO24, PLASTIC, SO-24

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