ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢊ
ꢀꢋ ꢁꢈ ꢌ ꢍ ꢎ ꢏꢋꢁ ꢐꢑꢒ ꢍꢓ ꢆꢌ ꢑꢀꢋ ꢔꢍ ꢏꢕ ꢖ ꢈ ꢄꢒꢍ
SCLS323M − MARCH 1996 − REVISED JUNE 2005
D
D
D
D
D
Operating Range of 2 V to 5.5 V
D
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Max t of 8 ns at 5 V
pd
Low Power Consumption, 10-µA Max I
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
CC
8-mA Output Drive at 5 V
Schmitt Trigger Action at All Inputs Makes
the Circuit Tolerant for Slower Input Rise
and Fall Time
− 1000-V Charged-Device Model (C101)
DCK PACKAGE
(TOP VIEW)
DBV PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
A
B
V
Y
1
2
3
5
1
2
3
5
A
B
V
Y
CC
CC
1
2
3
5
4
A
B
V
Y
CC
4
GND
4
GND
GND
See mechanical drawings for dimensions.
description/ordering information
The SN74AHC1G86 is a single 2-input exclusive-OR gate. The device performs the Boolean function Y = A ⊕ B
or Y = AB + AB in positive logic.
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the
output.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
‡
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
SN74AHC1G86DBVR
SN74AHC1G86DBVT
SN74AHC1G86DCKR
SN74AHC1G86DCKT
SOT (SOT-23) − DBV
A86_
−40°C to 85°C
SOT (SC-70) − DCK
AH_
AH_
SOT (SOT-553) − DRL Reel of 4000
SN74AHC1G86DRLR
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUTS
OUTPUT
Y
A
B
L
L
L
L
H
H
L
H
L
H
H
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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