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SN74AHC1G32DCKRE4 PDF预览

SN74AHC1G32DCKRE4

更新时间: 2024-11-23 22:32:11
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
9页 238K
描述
SINGLE 2-INPUT POSITIVE-OR GATE

SN74AHC1G32DCKRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:TSSOP, TSSOP5/6,.08针数:5
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:5.08系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G5JESD-609代码:e4
长度:2 mm负载电容(CL):50 pF
逻辑集成电路类型:OR GATE最大I(ol):0.008 A
湿度敏感等级:1功能数量:1
输入次数:2端子数量:5
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP5/6,.08封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:2/5.5 V
最大电源电流(ICC):0.01 mAProp。Delay @ Nom-Sup:8.5 ns
传播延迟(tpd):13 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.1 mm
子类别:Gate最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:1.25 mmBase Number Matches:1

SN74AHC1G32DCKRE4 数据手册

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ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢊ  
ꢀꢋ ꢁꢈ ꢌ ꢍ ꢊ ꢎꢋꢁ ꢏꢐꢑ ꢏꢒ ꢀꢋ ꢑ ꢋꢓꢍꢎ ꢒ ꢔ ꢈ ꢄꢑꢍ  
SCLS317N − MARCH 1996 − REVISED JUNE 2005  
D
D
D
D
Operating Range of 2 V to 5.5 V  
D
D
Schmitt Trigger Action at All Inputs Makes  
the Circuit Tolerant for Slower Input Rise  
and Fall Time  
Max t of 6.5 ns at 5 V  
pd  
Low Power Consumption, 10-µA Max I  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
8-mA Output Drive at 5 V  
DCK PACKAGE  
(TOP VIEW)  
DBV PACKAGE  
(TOP VIEW)  
DRL PACKAGE  
(TOP VIEW)  
A
B
V
Y
1
2
3
5
4
1
2
3
5
A
B
V
Y
CC  
CC  
1
2
3
5
4
A
B
V
Y
CC  
4
GND  
GND  
GND  
See mechanical drawings for dimensions.  
description/ordering information  
The SN74AHC1G32 is a single 2-input positive-OR gate. The device performs the Boolean function  
Y + A ) B or Y + A B in positive logic.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Reel of 3000  
Reel of 250  
Reel of 3000  
Reel of 250  
Reel of 4000  
SN74AHC1G32DBVR  
SN74AHC1G32DBVT  
SN74AHC1G32DCKR  
SN74AHC1G32DCKT  
SN74AHC1G32DRLR  
SOT (SOT-23) − DBV  
A32_  
−40°C to 85°C  
SOT (SC-70) − DCK  
AG_  
AG_  
SOT (SOT-553) – DRL  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
The actual top-side marking has one additional character that designates the assembly/test site.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
A
B
X
H
L
H
X
L
H
H
L
logic diagram (positive logic)  
1
2
A
B
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢑꢡ  
Copyright 2005, Texas Instruments Incorporated  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74AHC1G32DCKRE4 替代型号

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