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SN74AHC16245DGV

更新时间： 2024-02-13 17:28:02
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路电视
页数 文件大小 规格书
7页 114K
描述
AHC SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, PLASTIC, TVSOP-48

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中文翻译

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SN74AHC16245DGV 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：TSSOP,针数：48
Reach Compliance Code：unknown风险等级：5.84
系列：AHCJESD-30 代码：R-PDSO-G48
长度：9.7 mm逻辑集成电路类型：BUS TRANSCEIVER
位数：8功能数量：2
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟（tpd）：13.5 ns认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.4 mm端子位置：DUAL
宽度：4.4 mmBase Number Matches：1

SN74AHC16245DGV 数据手册

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SN54AHC16245, SN74AHC16245  
16-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCLS328C – MARCH 1996 – REVISED JULY 1998  
SN54AHC16245 . . . WD PACKAGE  
SN74AHC16245 . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
Operating Range 2-V to 5.5-V V  
CC  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
4
5
Flow-Through Architecture Optimizes PCB  
Layout  
6
7
V
V
CC  
CC  
Package Options Include Plastic  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
Shrink Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
description  
The ’AHC16245 devices are 16-bit (dual-octal)  
noninverting 3-state transceivers designed for  
synchronous two-way communication between  
data buses. The control-function implementation  
minimizes external timing requirements.  
V
V
CC  
CC  
2B5  
2B6  
GND  
2B7  
2B8  
2DIR  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
These devices can be used as two 8-bit  
transceivers or one 16-bit transceiver. They allow  
data transmission from the A bus to the B bus or  
fromtheBbustotheAbus, dependingonthelogic  
level at the direction-control (DIR) input. The  
output-enable (OE) input can be used to disable  
the device so that the buses are effectively  
isolated.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54AHC16245 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74AHC16245 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each 8-bit section)  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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