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SN74AC374N PDF预览

SN74AC374N

更新时间: 2024-11-19 23:03:07
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
16页 536K
描述
OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS WITH 3 STATE OUTPUTS

SN74AC374N 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP20,.3针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.86控制类型:ENABLE LOW
计数方向:UNIDIRECTIONAL系列:AC
JESD-30 代码:R-PDIP-T20JESD-609代码:e4
长度:25.4 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:60000000 Hz
最大I(ol):0.024 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3/5 V最大电源电流(ICC):0.04 mA
Prop。Delay @ Nom-Sup:15.5 ns传播延迟(tpd):15.5 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:FF/Latches最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
Base Number Matches:1

SN74AC374N 数据手册

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SCAS543E − OCTOBER 1995 - REVISED OCTOBER 2003  
SN54AC374 . . . J OR W PACKAGE  
SN74AC374 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
2-V to 6-V V  
Operation  
CC  
Inputs Accept Voltages to 6 V  
Max t of 9.5 ns at 5 V  
pd  
3-State Noninverting Outputs Drive Bus  
Lines Directly  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
19 8Q  
1
2
3
4
5
6
7
8
9
10  
20  
18 8D  
D
Full Parallel Access for Loading  
17  
16  
15  
14  
13  
12  
11  
7D  
7Q  
6Q  
6D  
5D  
5Q  
CLK  
description/ordering information  
These 8-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. The devices  
are particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
GND  
SN54AC374 . . . FK PACKAGE  
(TOP VIEW)  
The eight flip-flops of the ’AC374 devices are  
D-type edge-triggered flip-flops. On the positive  
transition of the clock (CLK) input, the Q outputs  
are set to the logic levels set up at the data (D)  
inputs.  
3
2
1
20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
4
5
6
7
8
17  
16  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or the  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
the increased drive provide the capability to drive  
bus lines in bus-organized systems without need  
for interface or pullup components.  
15 6Q  
14 6D  
9 10 11 12 13  
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
Tube  
SN74AC374N  
SN74AC374N  
Tube  
SN74AC374DW  
SN74AC374DWR  
SN74AC374NSR  
SN74AC374DBR  
SN74AC374PW  
SN74AC374PWR  
SNJ54AC374J  
SOIC − DW  
AC374  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
AC374  
AC374  
−40°C to 85°C  
−55°C to 125°C  
SSOP − DB  
TSSOP − PW  
AC374  
Tape and reel  
Tube  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54AC374J  
SNJ54AC374W  
SNJ54AC374FK  
Tube  
SNJ54AC374W  
SNJ54AC374FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢉ ꢙ ꢤ ꢜ ꢛꢧ ꢢꢡ ꢟꢠ ꢡꢛ ꢝꢤ ꢦꢘ ꢞꢙ ꢟ ꢟꢛ ꢮꢓ ꢋꢍ ꢏꢒ ꢔ ꢍꢆꢯꢂ ꢆꢂꢈ ꢞꢦꢦ ꢤꢞ ꢜ ꢞ ꢝꢣ ꢟꢣꢜ ꢠ ꢞ ꢜ ꢣ ꢟꢣ ꢠꢟꢣ ꢧ  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
ꢢ ꢙꢦ ꢣꢠꢠ ꢛ ꢟꢩꢣ ꢜ ꢫꢘ ꢠꢣ ꢙ ꢛꢟꢣ ꢧꢨ ꢉ ꢙ ꢞꢦ ꢦ ꢛ ꢟꢩꢣ ꢜ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢠ ꢈ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢘꢛ ꢙ  
ꢛꢡ  
ꢛꢟ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74AC374N 替代型号

型号 品牌 替代类型 描述 数据表
SNJ54AC374J TI

完全替代

OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS WITH 3 STATE OUTPUTS
TC74AC374P TOSHIBA

类似代替

OCTAL D - TYPE FLIP -FLOP WITH 3 STATE OUTPUT
5962-8769401RA TI

类似代替

OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS WITH 3 STATE OUTPUTS

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SN74AC374PWR TI

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SN74AC374PWRE4 TI

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