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SN65MLVD207DR PDF预览

SN65MLVD207DR

更新时间： 2024-11-28 22:40:27
品牌 Logo 应用领域
德州仪器 - TI 驱动器
页数 文件大小 规格书
21页 328K
描述
MULTIPOINT-LVDS LINE DRIVER AND RECEIVER

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SN65MLVD207DR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP, SOP14,.25针数：14
Reach Compliance Code：compliantECCN代码：5A991.B.1
HTS代码：8542.39.00.01风险等级：1.07
差分输出：YES驱动器位数：1
高电平输入电流最大值：0.00001 A输入特性：DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型：LINE TRANSCEIVER接口标准：EIA-899; TIA-899
JESD-30 代码：R-PDSO-G14JESD-609代码：e4
长度：8.65 mm湿度敏感等级：1
功能数量：1端子数量：14
最高工作温度：85 °C最低工作温度：-40 °C
最小输出摆幅：0.48 V输出特性：DIFFERENTIAL
最大输出低电流：0.008 A输出极性：COMPLEMENTARY
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP14,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：3.3 V认证状态：Not Qualified
最大接收延迟：6 ns接收器位数：1
座面最大高度：1.75 mm子类别：Line Driver or Receivers
最大压摆率：24 mA最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
电源电压1-最大：3.6 V电源电压1-分钟：3 V
电源电压1-Nom：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED最大传输延迟：2.4 ns
宽度：3.9 mmBase Number Matches：1

SN65MLVD207DR 数据手册

 浏览型号SN65MLVD207DR的Datasheet PDF文件第2页浏览型号SN65MLVD207DR的Datasheet PDF文件第3页浏览型号SN65MLVD207DR的Datasheet PDF文件第4页浏览型号SN65MLVD207DR的Datasheet PDF文件第5页浏览型号SN65MLVD207DR的Datasheet PDF文件第6页浏览型号SN65MLVD207DR的Datasheet PDF文件第7页 
SN65MLVD201, SN65MLVD203  
SN65MLVD206, SN65MLVD207  
www.ti.com  
SLLS558A– DECEMBER 2002 – JUNE 2003  
MULTIPOINT-LVDS LINE DRIVER AND RECEIVER  
D
D
D
D
Backplane or Cabled Multipoint Data and  
Clock Transmission  
FEATURES  
D
Low-Voltage Differential 30-Ω to 55-Ω Line  
Drivers and Receivers for Signaling Rates  
Up to 200 Mbps  
Cellular Base Stations  
(1)  
Central-Office Switches  
Network Switches and Routers  
D
D
Type-1 Receivers Incorporate 25 mV of  
Hysteresis  
DESCRIPTION  
Type-2 Receivers Provide an Offset  
(100 mV) Threshold to Detect Open-Circuit  
and Idle-Bus Conditions  
The SN65MLVD201, 203, 206, and 207 are  
multipoint-low-voltage differential (M-LVDS) line drivers  
and receivers, which are optimized to operate at signaling  
rates up to 200 Mbps. All parts comply with the multipoint  
low-voltage differential signaling (M–LVDS) standard  
TIA/EIA-899. These circuits are similar to their  
TIA/EIA-644 standard compliant LVDS counterparts, with  
added features to address multipoint applications. The  
driver output has been designed to support multipoint  
buses presenting loads as low as 30 Ω, and incorporates  
controlled transition times to allow for stubs off of the  
backbone transmission line.  
D
Meets or Exceeds the M-LVDS Standard  
TIA/EIA-899 for Multipoint Data Interchange  
D
Power Up/Down Glitch Free  
D
Controlled Driver Output Voltage Transition  
Times for Improved Signal Quality  
D
–1 V to 3.4 V Common-Mode Voltage Range  
Allows Data Transfer With 2 V of Ground  
Noise  
D
D
Bus Pins High Impedance When Disabled or  
These devices have Type-1 and Type-2 receivers that  
detect the bus state with as little as 50 mV of differential  
input voltage over a common-mode voltage range of –1 V  
to 3.4 V. The Type-1 receivers exhibit 25 mV of differential  
input voltage hysteresis to prevent output oscillations with  
slowly changing signals or loss of input. Type-2 receivers  
include an offset threshold to provide a known output state  
under open-circuit, idle-bus, and other faults conditions.  
The devices are characterized for operation from –40°C to  
85°C.  
V
≤ 1.5 V  
CC  
100-Mbps Devices Available  
(SN65MLVD200, 202, 204, 205)  
APPLICATIONS  
D
Low-Power High-Speed Short-Reach  
Alternative to TIA/EIA-485  
LOGIC DIAGRAM (POSITIVE LOGIC)  
SN65MLVD201,SN65MLVD206  
SN65MLVD203,SN65MLVD207  
9
3
Y
DE  
5
D
DE  
RE  
10  
Z
4
D
4
3
2
RE  
R
12  
11  
A
B
6
7
2
A
B
1
R
Pleasebe aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
(1)  
The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).  
PRODUCTION DATA information is current as of publication date. Products  
conform to specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all parameters.  
Copyright 2002 – 2003, Texas Instruments Incorporated  
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SN65MLVD207DR 替代型号

型号 品牌 替代类型 描述 数据表
SN65MLVD207DRG4 TI

完全替代

 MULTIPOINT-LVDS LINE DRIVER AND RECEIVER
SN65MLVD207DG4 TI

完全替代

 MULTIPOINT-LVDS LINE DRIVER AND RECEIVER
SN65MLVD207D TI

完全替代

 MULTIPOINT-LVDS LINE DRIVER AND RECEIVER

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