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SN65MLVD3 PDF预览

SN65MLVD3

更新时间: 2024-11-06 04:31:19
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德州仪器 - TI /
页数 文件大小 规格书
17页 341K
描述
SINGLE M-LVDS RECEIVERS

SN65MLVD3 数据手册

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SN65MLVD2  
SN65MLVD3  
www.ti.com  
SLLS767NOVEMBER 2006  
SINGLE M-LVDS RECEIVERS  
FEATURES  
APPLICATIONS  
Parallel Multipoint Data and Clock  
Transmission via Backplanes and Cables  
Low-Voltage Differential 30-to 55-Line  
Receivers for Signaling Rates(1) up to  
250Mbps; Clock Frequencies up to 125MHz  
Cellular Base Stations  
Central Office Switches  
Network Switches and Routers  
SN65MLVD2 Type-1 Receiver Incorporates 25  
mV of Input Threshold Hysteresis  
SN65MLVD3 Type-2 Receiver Provides 100  
mV Offset Threshold to Detect Open-Circuit  
and Idle-Bus Conditions  
PACKAGE AND PIN-OUT  
SN65MLVD2DRB  
SN65MLVD3DRB  
SON-8  
Wide Receiver Input Common-Mode Voltage  
Range, –1 V to 3.4 V, Allows 2 V of Ground  
Noise  
VCC  
B
VCC  
1
2
3
4
8
Improved VIT (35 mV)  
RE  
R
7
Meets or Exceeds the M-LVDS Standard  
TIA/EIA-899 for Multipoint Topology  
A
6
5
High Input Impedance with Low Supply  
Voltage  
GND  
GND  
Bus-Pin HBM ESD Protection Exceeds 9 kV  
Packaged in 8-Pin SON (DRB) 70% Smaller  
Than 8-Pin SOIC  
(1)  
The signaling rate of a line is the number of voltage  
transitions that are made per second, expressed in the units  
bps (bits per second).  
DESCRIPTION  
The SN65MLVD2 and SN65MLVD3 are single-channel M-LVDS receivers. These devices are designed in full  
compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to  
250 Mbps. Each receiver channel is controlled by a receive enable (RE). When RE = low, the corresponding  
channel is enabled; when RE = high, the corresponding channel is disabled.  
The M-LVDS standard defines two types of receivers, designated as Type-1 and Type-2. Type-1 receivers  
(SN65MLVD2) have thresholds centered about zero with 25 mV of hysteresis to prevent output oscillations with  
loss of input; Type-2 receivers (SN65MLVD3) implement a failsafe by using an offset threshold. Receiver  
outputs are slew rate controlled to reduce EMI and crosstalk effects associated with large current surges.  
The devices are characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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