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SN65LVDS150PWRG4 PDF预览

SN65LVDS150PWRG4

更新时间： 2024-09-28 15:51:59
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
15页 192K
描述
PLL FREQUENCY SYNTHESIZER, 50MHz, PDSO28, GREEN, TSSOP-28

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SN65LVDS150PWRG4 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：GREEN, TSSOP-28针数：28
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.43Is Samacsys：N
模拟集成电路 - 其他类型：PLL FREQUENCY SYNTHESIZERJESD-30 代码：R-PDSO-G28
JESD-609代码：e4长度：9.7 mm
湿度敏感等级：1功能数量：1
端子数量：28最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

SN65LVDS150PWRG4 数据手册

 浏览型号SN65LVDS150PWRG4的Datasheet PDF文件第2页浏览型号SN65LVDS150PWRG4的Datasheet PDF文件第3页浏览型号SN65LVDS150PWRG4的Datasheet PDF文件第4页浏览型号SN65LVDS150PWRG4的Datasheet PDF文件第5页浏览型号SN65LVDS150PWRG4的Datasheet PDF文件第6页浏览型号SN65LVDS150PWRG4的Datasheet PDF文件第7页 
SN65LVDS150  
www.ti.com  
SLLS443–DECEMBER 2000  
MuxIt™ PLL FREQUENCY MULTIPLIER  
FEATURES  
SN65LVDS150  
PW PACKAGE  
(Marked as 65LVDS150)  
•
A Member of the MuxIt™ Serializer-  
Deserializer Building-Block Chip Family  
•
Pin Selectable Frequency Multiplier Ratios  
Between 4 and 40  
V
NC  
NC  
NC  
V
GND  
NC  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
CC  
CRI+  
CRI–  
2
•
•
Input Clock Frequencies From 5 to 50 MHz  
3
Multiplied Clock Frequencies up to  
400 MHz  
V
T
4
CC  
GND  
M1  
5
•
•
Internal Loop Filters and Low PLL-Jitter of  
20 ps RMS Typical at 200 MHz  
6
M2  
M3  
GND  
NC  
7
LVDS Compatible Differential Inputs and  
Outputs Meet or Exceed the Requirements of  
ANSI EIA/TIA-644-A  
8
M4  
M5  
MCO+  
MCO–  
GND  
EN  
9
10  
11  
12  
BSEL  
GND  
•
•
LVTTL Compatible Inputs Are 5 V Tolerant  
LVDS Inputs and Outputs ESD Protection  
Exceeds 12 kV HBM  
LCRO– 13  
14  
16 LCRO_EN  
15  
LCRO+  
LVO  
•
•
Operates From a Single 3.3 V Supply  
NC – No internal connection  
Packaged in 28-Pin Thin Shrink Small-Outline  
Package With 26 mil Terminal Pitch  
DESCRIPTION  
The MuxIt is a family of general-purpose, multiple-chip building blocks for implementing parallel data serializers  
and deserializers. The system allows for wide parallel data to be transmitted through a reduced number of  
differential transmission lines over distances greater than can be achieved with a single-ended (e.g., LVTTL or  
LVCMOS) data interface. The number of bits multiplexed per transmission line is user selectable, allowing for  
higher transmission efficiencies than with other existing fixed ratio solutions. Muxlt utilizes the LVDS  
(TIA/EIA-644) low voltage differential signaling technology for communications between the data source and data  
destination.  
The MuxIt family initially includes three devices supporting simplex communications; The SN65LVDS150 Phase  
Locked Loop-Frequency Multiplier, The SN65LVDS151 Serializer-Transmitter, and The SN65LVDS152  
Receiver-Deserializer.  
The SN65LVDS150 is a PLL based frequency multiplier designed for use with the other members of the MuxIt  
family of serializers and deserializers. The frequency multiplication ratio is pin selectable over a wide range of  
values from 4 through 40 to accommodate a broad spectrum of user needs. No external filter components are  
needed. A PLL lock indicator output is available which may be used to enable link data transfers.  
The design of the SN65LVDS150 allows it to be used at either the transmit end or the receive end of the MuxIt  
serial link. The differential clock reference input (CRI) is driven by the system's parallel data clock when at the  
source end of the link, or by the link clock when at the destination end of the link. The differential clock reference  
input may be driven by either an LVDS differential signal, or by a single ended clock of either polarity. For  
single-ended use the nonclocked input is biased to the logic threshold voltage. A VCC/2 threshold reference, VT,  
is provided on a pin adjacent the differential CRI pins for convenience when the input is used in a single-ended  
mode.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
MuxIt is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2000, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...15

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SN65LVDS150PWRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN65LVDS150PW TI

完全替代

 MuxIt-TM PLL FREQUENCY MULTIPLIER
SN65LVDS150PWR TI

功能相似

 MuxIt-TM PLL FREQUENCY MULTIPLIER

与SN65LVDS150PWRG4相关器件

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SN65LVDS151DA TI

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SN65LVDS151DAR TI

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SN65LVDS151DARG4 TI

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SN65LVDS152 TI

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SN65LVDS152DA TI

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 		MuxIt RECEIVER-DESERIALIZER
SN65LVDS152DAG4 TI

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 		LINE RECEIVER, PDSO32, 0.65 MM PITCH, GREEN, TSSOP-32
SN65LVDS152DAR TI

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 		MuxIt RECEIVER-DESERIALIZER
SN65LVDS152DARG4 TI

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 		MuxIt RECEIVER-DESERIALIZER
SN65LVDS16 TI

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 		2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS

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