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SN65LVDS151DARG4 PDF预览

SN65LVDS151DARG4

更新时间: 2024-01-24 10:43:32
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
18页 253K
描述
MuxIt SERIALIZER-TRANSMITTER

SN65LVDS151DARG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP32,.3针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.42
差分输出:YES驱动器位数:1
输入特性:STANDARD接口集成电路类型:LINE DRIVER
接口标准:EIA-644-A; TIA-644-AJESD-30 代码:R-PDSO-G32
JESD-609代码:e4长度:11 mm
湿度敏感等级:2功能数量:1
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP32,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified最大接收延迟:
座面最大高度:1.2 mm子类别:Line Driver or Receivers
最大压摆率:65 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
最大传输延迟:5.8 ns宽度:6.2 mm
Base Number Matches:1

SN65LVDS151DARG4 数据手册

 浏览型号SN65LVDS151DARG4的Datasheet PDF文件第2页浏览型号SN65LVDS151DARG4的Datasheet PDF文件第3页浏览型号SN65LVDS151DARG4的Datasheet PDF文件第4页浏览型号SN65LVDS151DARG4的Datasheet PDF文件第5页浏览型号SN65LVDS151DARG4的Datasheet PDF文件第6页浏览型号SN65LVDS151DARG4的Datasheet PDF文件第7页 
SN65LVDS151  
MuxIt SERIALIZER-TRANSMITTER  
SLLS444A – DECEMBER 2000  
SN65LVDS151DA  
D
A Member of the MuxIt  
Serializer-Deserializer Building-Block Chip  
Family  
(Marked as 65LVDS151)  
CI–  
V
1
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
CC  
D
D
D
Supports Serialization of up to 10 Bits of  
Parallel Data Input at Rates up to 200 Mbps  
CI+  
GND  
LCRI+  
LCRI–  
CI_EN  
DI–9  
2
LVI  
3
PLL Lock/Valid Input Provided to Enable  
Link Data Transfers  
MCI–  
MCI+  
GND  
4
5
Cascadable With Additional SN65LVDS151  
MuxIt Serializer-Transmitters for Wider  
Parallel Input Data Channel Widths  
6
V
DI–8  
7
CC  
LCO+  
LCO–  
DI–7  
8
DI–6  
D
LVDS Compatible Differential Inputs and  
Outputs Meet or Exceed the Requirements  
of ANSI TIA/EIA-644-A  
9
V
DI–5  
10  
11  
12  
CC  
EN  
DI–4  
LCO_EN  
VCC5  
GND  
DO+  
DI–3  
D
D
LVDS Inputs and Outputs ESD Protection  
Exceeds 12 kV HBM  
DI–2 13  
DI–1 14  
DI–0 15  
LVTTL Compatible Inputs for Lock/Valid,  
Enables, and Parallel Data Inputs Are 5-V  
Tolerant  
DO–  
16  
GND  
D
D
Operates With 3.3 V Supply  
Packaged in 32-Pin DA Thin Shrink  
Small-Outline Package With 26 Mil Terminal  
Pitch  
description  
MuxIt is a family of general-purpose, multiple-chip building blocks for implementing parallel data serializers and  
deserializers. The system allows for wide parallel data to be transmitted through a reduced number of  
transmission lines over distances greater than can be achieved with a single-ended (e.g., LVTTL or LVCMOS)  
data interface. The number of bits multiplexed per transmission line is user-selectable and allows for higher  
transmission efficiencies than with existing fixed ratio solutions. MuxIt utilizes the LVDS (TIA/EIA-644-A) low  
voltage differential signaling technology for communications between the data source and data destination.  
The MuxIt family initially includes three devices supporting simplex communications: the SN65LVDS150 phase  
locked loop frequency multiplier, the SN65LVDS151 serializer-transmitter, and the SN65LVDS152  
receiver-deserializer.  
The SN65LVDS151 consists of a 10-bit parallel-in/serial-out shift register, three LVDS differential transmission  
line receivers, a pair of LVDS differential transmission line drivers, plus associated input buffers. It accepts up  
to10bitsofuserdataonparalleldatainputs(DI–0DI–9)andserializes(multiplexes)thedatafortransmission  
over an LVDS transmission line link. Two or more SN65LVDS151 units may be connected in series (cascaded)  
to accommodate wider parallel data paths for higher serialization values. Data is transmitted over the LVDS  
serial link at M times the input parallel data clock frequency. The multiplexing ratio M, or number of bits per data  
clock cycle, is programmed on the companion SN65LVDS150 MuxIt programmable PLL frequency multiplier  
with configuration pins (M1 M5). The range of multiplexing ratio M supported by the SN65LVDS150 MuxIt  
programmable PLL frequency multiplier is between 4 and 40. Table 1 shows some of the combinations of LCRI  
and MCI supported by the SN65LVDS150 MuxIt programmable PLL frequency multiplier.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
MuxIt is a trademark of Texas Instruments.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN65LVDS151DARG4 替代型号

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