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SN54LV4040AJ PDF预览

SN54LV4040AJ

更新时间: 2024-11-24 23:03:07
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德州仪器 - TI 计数器
页数 文件大小 规格书
8页 162K
描述
12-BIT ASYNCHRONOUS BINARY COUNTERS

SN54LV4040AJ 数据手册

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SN54LV4040A, SN74LV4040A  
12-BIT ASYNCHRONOUS BINARY COUNTERS  
SCES226A – APRIL 1999 – REVISED SEPTEMBER 1999  
SN54LV4040A . . . J OR W PACKAGE  
SN74LV4040A . . . D, DB, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
Q
Q
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
A
L
Q
Q
Q
Q
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
F
E
K
J
H
I
OHV  
CC  
OH  
Q
Q
= 3.3 V, T = 25°C  
A
G
High On-Off Output-Voltage Ratio  
Low Crosstalk Between Switches  
Individual Switch Controls  
Q
D
C
Q
CLR  
CLK  
Q
B
Extremely Low Input Current  
GND  
Q
A
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
SN54LV4040A . . . FK PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
3
2
1
20 19  
18  
Q
Q
Q
Q
Package Options Include Plastic  
4
5
6
7
8
J
E
Small-Outline (D, NS), Shrink Small-Outline  
(DB), Thin Very Small-Outline (DGV), Thin  
Shrink Small-Outline (PW), and Ceramic  
Flat (W) Packages, Ceramic Chip Carriers  
(FK), and Standard Ceramic (J) DIPs  
17  
16  
15  
14  
H
G
NC  
NC  
Q
I
CLR  
Q
D
Q
C
9 10 11 12 13  
description  
NC – No internal connection  
The ’LV4040A devices are 12-bit asynchronous  
binary counters with the outputs of all stages  
availableexternally. A high level at the clear (CLR)  
input asynchronously clears the counter and  
resets all outputs low. The count is advanced on  
a high-to-low transition at the clock (CLK) input.  
Applications include time-delay circuits, counter  
controls, and frequency-dividing circuits.  
The SN54LV4040A is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74LV4040A is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
FUNCTION  
CLK  
CLR  
L
No change  
Advance to next stage  
All outputs L  
L
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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