SN54LV14J

更新时间： 2024-11-02 13:13:47

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SN54LV14J 数据手册

SN54LV14, SN74LV14

HEX SCHMITT-TRIGGER INVERTERS

SCLS187C – FEBRUARY 1993 – REVISED FEBRUARY 1998

SN54LV14 . . . J OR W PACKAGE

SN74LV14 . . . D, DB, OR PW PACKAGE

(TOP VIEW)

EPIC (Enhanced-Performance Implanted

CMOS) 2-µ Process

Typical V

< 0.8 V at V , T = 25°C

(Output Ground Bounce)

OLP

Typical V

> 2 V at V , T = 25°C

(Output V

Undershoot)

OHV

ESD Protection Exceeds 2000 V Per

MIL-STD-883C, Method 3015; Exceeds

200 V Using Machine Model (C = 200 pF,

R = 0)

10 5Y

GND

Latch-Up Performance Exceeds 250 mA

JESD 17

SN54LV14 . . . FK PACKAGE

(TOP VIEW)

Package Options Include Plastic

Small-Outline (D), Shrink Small-Outline

(DB), Thin Shrink Small-Outline (PW),

Ceramic Flat (W) Packages, Chip Carriers

(FK), and (J) 300-mil DIPs

20 19

description

15 NC

9 10 11 12 13

These hex Schmitt-trigger inverters are designed

for 2.7-V to 5.5-V V operation.

The ’LV14 devices contain six independent

inverters. These devices perform the Boolean

function Y = A.

NC – No internal connection

TheSN54LV14ischaracterizedforoperationover

the full military temperature range of –55°C to

125°C. The SN74LV14 is characterized for

operation from –40°C to 85°C.

FUNCTION TABLE

(each inverter)

INPUT

OUTPUT

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6

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