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SN54LS395 PDF预览

SN54LS395

更新时间: 2024-11-20 23:03:07
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 移位寄存器输出元件
页数 文件大小 规格书
6页 199K
描述
4-BIT SHIFT REGISTER WITH 3-STATE OUTPUTS

SN54LS395 数据手册

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SN74LS395  
4-BIT SHIFT REGISTER  
WITH 3-STATE OUTPUTS  
The SN74LS395 is a 4-Bit Register with 3-state outputs and can operate  
in either a synchronous parallel load or a serial shift-right mode, as  
determined by the Select input. An asynchronous active LOW Master Reset  
(MR) input overrides the synchronous operations and clears the register. An  
active HIGH Output Enable (OE) input controls the 3-state output buffers, but  
does not interfere with the other operations. The fourth stage also has a  
conventional output for linking purposes in multi-stage serial operations.  
4-BIT SHIFT REGISTER  
WITH 3-STATE OUTPUTS  
LOW POWER SCHOTTKY  
Shift Left or Parallel 4-Bit Register  
3-State Outputs  
Input Clamp Diodes Limit High-Speed Termination Effects  
J SUFFIX  
CERAMIC  
CASE 620-09  
CONNECTION DIAGRAM DIP (TOP VIEW)  
16  
1
N SUFFIX  
PLASTIC  
CASE 648-08  
16  
1
D SUFFIX  
SOIC  
CASE 751B-03  
16  
1
PIN NAMES  
LOADING (Note a)  
HIGH  
LOW  
ORDERING INFORMATION  
P P  
0
Parallel Inputs  
Serial Data Input  
Mode Select Input  
Clock (Active LOW) Input  
Master Reset (Active LOW) Input  
Output Enable (Active HIGH) Input  
3-State Register Outputs  
Register Output  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
65 U.L.  
10 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
15 U.L.  
3
D
SN74LSXXXJ  
Ceramic  
S
S
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
CP  
MR  
OE  
O O  
0
3
3
5 U.L.  
Q
LOGIC SYMBOL  
NOTES:  
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
FAST AND LS TTL DATA  
5-551  

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