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SN54LS398JD PDF预览

SN54LS398JD

更新时间: 2024-11-15 13:13:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
6页 211K
描述
LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP20, CERAMIC, DIP-20

SN54LS398JD 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84Is Samacsys:N
其他特性:FOUR 2:1 MUX FOLLOWED BY REGISTER系列:LS
JESD-30 代码:R-CDIP-T20长度:24.515 mm
负载电容(CL):15 pF逻辑集成电路类型:D FLIP-FLOP
位数:4功能数量:1
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
最大电源电流(ICC):13 mA传播延迟(tpd):32 ns
认证状态:Not Qualified座面最大高度:5.08 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:7.62 mmBase Number Matches:1

SN54LS398JD 数据手册

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SN54/74LS398  
SN54/74LS399  
QUAD 2-PORT REGISTER  
The SN54/74LS398 and SN54/74LS399 are Quad 2-Port Registers. They  
arethelogicalequivalentofaquad2-inputmultiplexerfollowedbyaquad4-bit  
edge-triggered register. A Common Select input selects between two 4-bit in-  
putports(datasources). Theselecteddataistransferredtotheoutputregister  
on the LOW-to-HIGH transition of the Clock input. The SN54/74LS398 fea-  
tures both Q and Q inputs, while the SN54/74LS399 has only Q outputs.  
QUAD 2-PORT REGISTER  
LOW POWER SCHOTTKY  
Select From Two Data Sources  
Fully Positive Edge-Triggered Operation  
Both True and Complemented Outputs on SN54/74LS398  
Input Clamp Diodes Limit High-Speed Termination Effects  
CONNECTION DIAGRAM DIP (TOP VIEW)  
J SUFFIX  
CERAMIC  
CASE 620-09  
16  
1
SN54/74LS398  
N SUFFIX  
PLASTIC  
CASE 648-08  
16  
1
D SUFFIX  
SOIC  
CASE 751B-03  
16  
1
SN54/74LS399  
J SUFFIX  
CERAMIC  
CASE 732-03  
20  
1
N SUFFIX  
PLASTIC  
CASE 738-03  
PIN NAMES  
LOADING (Note a)  
20  
HIGH  
LOW  
1
S
CP  
Common Select Input  
Clock (Active HIGH Going Edge) Input  
Data Inputs From Source 0  
Data Inputs From Source 1  
Register True Outputs (Note b)  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
10 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
5 (2.5) U.L.  
DW SUFFIX  
SOIC  
CASE 751D-03  
I
–I  
0a 0d  
20  
I I  
1a 0d  
1
Q Q  
Q Q  
a
a
d
d
Register Complementary Outputs  
(Note b)  
10 U.L.  
5 (2.5) U.L.  
ORDERING INFORMATION  
NOTES:  
SN54LSXXXJ  
Ceramic  
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial  
(74) Temperature Ranges.  
SN74LSXXXN Plastic  
SN74LSXXXDW SOIC  
SN74LSXXXD SOIC  
FAST AND LS TTL DATA  
5-557  

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