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SN54HC574_06

更新时间： 2024-09-16 05:05:03
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
17页 536K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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SN54HC574_06 数据手册

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SN54HC574, SN74HC574  
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCLS148F – DECEMBER 1982 – REVISED AUGUST 2003  
SN54HC574 . . . J OR W PACKAGE  
SN74HC574 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Wide Operating Voltage Range of 2 V to 6 V  
High-Current 3-State Noninverting Outputs  
Drive Bus Lines Directly or Up To 15 LSTTL  
Loads  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1Q  
2Q  
1
2
3
4
5
6
7
8
9
20  
19  
18  
Low Power Consumption, 80-µA Max I  
CC  
Typical t = 22 ns  
pd  
17 3Q  
16 4Q  
15 5Q  
14 6Q  
13 7Q  
12 8Q  
11 CLK  
6-mA Output Drive at 5 V  
Low Input Current of 1 µA Max  
Bus-Structured Pinout  
description/ordering information  
GND 10  
These octal edge-triggered D-type flip-flops  
feature 3-state outputs designed specifically for  
bus driving. They are particularly suitable for  
implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers.  
SN54HC574 . . . FK PACKAGE  
(TOP VIEW)  
The eight flip-flops enter data on the low-to-high  
transition of the clock (CLK) input.  
3
2
1
20 19  
18  
2Q  
3Q  
4Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
17  
16  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or the  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without interface or pullup components.  
15 5Q  
14  
6Q  
9 10 11 12 13  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – N  
Tube of 20  
Tube of 25  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Tube of 70  
Reel of 2000  
Reel of 250  
Tube of 20  
Tube of 85  
Tube of 55  
SN74HC574N  
SN74HC574N  
SN74HC574DW  
SN74HC574DWR  
SN74HC574DBR  
SN74HC574NSR  
SN74HC574PW  
SN74HC574PWR  
SN74HC574PWT  
SNJ54HC574J  
SOIC – DW  
HC574  
SSOP – DB  
SOP – NS  
HC574  
HC574  
–40°C to 85°C  
TSSOP – PW  
HC574  
CDIP – J  
CFP – W  
LCCC – FK  
SNJ54HC574J  
SNJ54HC574W  
SNJ54HC574FK  
–55°C to 125°C  
SNJ54HC574W  
SNJ54HC574FK  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...17

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