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SN54BCT646JT PDF预览

SN54BCT646JT

更新时间: 2024-11-08 22:53:39
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
9页 132K
描述
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

SN54BCT646JT 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP24,.3
针数:24Reach Compliance Code:not_compliant
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.5其他特性:DIRECTION CONTROL; SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED/ REAL TIME DATA
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:BCT/FBTJESD-30 代码:R-GDIP-T24
长度:32.005 mm负载电容(CL):50 pF
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER最大I(ol):0.048 A
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP24,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):67 mA
Prop。Delay @ Nom-Sup:12.1 ns传播延迟(tpd):11.5 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:BICMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:POSITIVE EDGE宽度:7.62 mm

SN54BCT646JT 数据手册

 浏览型号SN54BCT646JT的Datasheet PDF文件第2页浏览型号SN54BCT646JT的Datasheet PDF文件第3页浏览型号SN54BCT646JT的Datasheet PDF文件第4页浏览型号SN54BCT646JT的Datasheet PDF文件第5页浏览型号SN54BCT646JT的Datasheet PDF文件第6页浏览型号SN54BCT646JT的Datasheet PDF文件第7页 
SN54BCT646, SN74BCT646  
OCTAL BUS TRANSCEIVERS AND REGISTERS  
WITH 3-STATE OUTPUTS  
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993  
SN54BCT646 . . . JT OR W PACKAGE  
SN74BCT646 . . . DW OR NT PACKAGE  
(TOP VIEW)  
State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
CLKAB  
SAB  
DIR  
A1  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
CLKBA  
SBA  
OE  
B1  
2
3
Bus Transceivers/Registers  
4
A2  
5
Independent Registers and Enables for  
A3  
B2  
6
A and B Buses  
A4  
B3  
7
Multiplexed Real-Time and Stored Data  
Power-Up High-Impedance Mode  
A5  
B4  
8
A6  
B5  
9
Package Options Include Plastic  
A7  
A8  
GND  
B6  
B7  
B8  
10  
11  
12  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK) and Flatpacks (W), and  
Plastic and Ceramic 300-mil DIPs (JT, NT)  
SN54BCT646 . . . FK PACKAGE  
(TOP VIEW)  
description  
These devices consist of bus transceiver circuits,  
D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the  
inputbusorfromtheinternalregisters. Dataonthe  
A or B bus is clocked into the registers on the  
low-to-high transition of the appropriate clock  
(CLKAB or CLKBA) input. Figure 1 illustrates the  
four fundamental bus-management functions that  
can be performed with the BCT646.  
4
3
2
1 28 27 26  
A1  
A2  
A3  
NC  
A4  
A5  
A6  
OE  
24 B1  
25  
5
6
23  
22  
21  
20  
19  
7
B2  
NC  
B3  
B4  
B5  
8
9
Output-enable (OE) and direction-control (DIR)  
inputs are provided to control the transceiver  
functions. In the transceiver mode, data present at  
the high-impedance port may be stored in either  
register or in both.  
10  
11  
12 13 14 15 16 17 18  
NC – No internal connection  
The select-control (SAB and SBA) inputs can  
multiplex stored and real-time (transparent mode)  
data. The direction control (DIR) determines which bus will receive data when OE is low. In the isolation mode  
(OE high), A data may be stored in one register and/or B data may be stored in the other register.  
When an output function is disabled, the input function is still enabled and may be used to store and transmit  
data. Only one of the two buses, A or B, may be driven at a time.  
The SN54BCT646 is characterized for operation over the full military temperature range of 55°C to 125°C. The  
SN74BCT646 is characterized for operation from 0°C to 70°C.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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