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SN54ALS01FKR PDF预览

SN54ALS01FKR

更新时间: 2024-11-04 19:53:35
品牌 Logo 应用领域
德州仪器 - TI 输入元件逻辑集成电路
页数 文件大小 规格书
3页 42K
描述
ALS SERIES, QUAD 2-INPUT NAND GATE, CQCC20, CERAMIC, LCC-20

SN54ALS01FKR 技术参数

生命周期:Obsolete零件包装代码:QLCC
包装说明:QCCN,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.82系列:ALS
JESD-30 代码:S-CQCC-N20长度:8.89 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
功能数量:4输入次数:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:OPEN-COLLECTOR
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装形状:SQUARE封装形式:CHIP CARRIER
最大电源电流(ICC):3 mA传播延迟(tpd):66 ns
认证状态:Not Qualified座面最大高度:2.03 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:MILITARY
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUAD宽度:8.89 mm
Base Number Matches:1

SN54ALS01FKR 数据手册

 浏览型号SN54ALS01FKR的Datasheet PDF文件第2页浏览型号SN54ALS01FKR的Datasheet PDF文件第3页 
SN54ALS01, SN74ALS01  
QUADRUPLE 2-INPUT POSITIVE-NAND GATES  
WITH OPEN-COLLECTOR OUTPUTS  
SDAS188 – D2661, APRIL 1982 – REVISED MAY 1986  
Package Options Include Plastic Small  
Outline Packages, Ceramic Chip Carriers,  
and Standard Plastic and Ceramic 300-mil  
DIPs  
SN54ALS01 . . . J PACKAGE  
SN74ALS01 . . . D OR N PACKAGE  
(TOP VIEW)  
Dependable Texas Instruments Quality and  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1Y  
1A  
1B  
2Y  
2A  
CC  
Reliability  
4Y  
4B  
4A  
3Y  
3B  
3A  
description  
These devices contain four independent 2-input  
NAND gates. They perform the Boolean functions  
Y = AB or Y = A+B in positive logic. The  
open-collector outputs require pullup resistors to  
performcorrectly. Theymaybeconnectedtoother  
open-collector outputs to implement active-low  
wired-OR or active-high wired-AND functions.  
Open-collector devices are often used to generate  
2B  
GND  
8
SN54ALS01 . . . FK PACKAGE  
(TOP VIEW)  
higher V  
levels.  
OH  
3
2
1
20 19  
18  
The SN54ALS01 is characterized for operation  
over the full military temperature range of 55°C  
to 125°C. The SN74ALS01 is characterized for  
operation from 0°C to 70°C.  
4B  
NC  
4A  
NC  
3Y  
1B  
NC  
2Y  
4
5
6
7
8
17  
16  
15  
14  
NC  
2A  
FUNCTION TABLE  
(each gate)  
9 10 11 12 13  
INPUTS  
OUTPUT  
A
H
L
B
H
X
L
Y
L
H
H
NCNo internal connection  
X
logic symbol  
logic diagram (positive logic)  
1A  
2
1Y  
&
1A  
1
4
1B  
1Y  
2Y  
3
1B  
5
2A  
2B  
2A  
2Y  
6
2B  
8
3A  
10  
13  
3A  
3B  
3Y  
4Y  
9
3Y  
4Y  
3B  
11  
4A  
4B  
12  
4A  
4B  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for D, J, and N packages.  
Copyright 1986, Texas Instruments Incorporated  
5BASIC  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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