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SDAS111B − APRIL 1982 − REVISED DECEMBER 1994
SN54ALS02A, SN54AS02 . . . J PACKAGE
SN74ALS02A, SN74AS02 . . . D OR N PACKAGE
(TOP VIEW)
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
1Y
1A
1B
2Y
2A
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
4Y
4B
4A
3Y
3B
3A
description
These devices contain four independent 2-input
positive-NOR gates. They perform the Boolean
functions Y = A + B or Y = A • B in positive logic.
2B
GND
8
The SN54ALS02A and SN54AS02 are
characterized for operation over the full military
temperature range of −55°C to 125°C. The
SN74ALS02A and SN74AS02 are characterized
for operation from 0°C to 70°C.
SN54ALS02A, SN54AS02 . . . FK PACKAGE
(TOP VIEW)
FUNCTION TABLE
(each gate)
3
2
1
20 19
18
1B
NC
2Y
4B
NC
4A
NC
3Y
4
5
6
7
8
INPUTS
OUTPUT
Y
17
16
15
14
A
B
X
H
L
H
X
L
L
L
NC
2A
9 10 11 12 13
H
NC − No internal connection
†
logic symbol
logic diagram (positive logic)
2
1A
3
2
1A
3
1
4
≥1
1
4
1Y
2Y
3Y
4Y
1Y
2Y
3Y
4Y
1B
5
1B
5
2A
6
2A
6
2B
8
2B
8
3A
9
10
13
3A
9
10
13
3B
11
3B
11
4A
12
4B
4A
12
4B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
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Copyright 1994, Texas Instruments Incorporated
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1
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