SN54ACT74

更新时间： 2024-11-14 22:59:11

品牌	Logo	应用领域
德州仪器 - TI		触发器
页数	文件大小	规格书
6页	89K
描述
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

阅读下载

中文翻译

获取价格

数据手册
替代型号

如果您发现信息不准确，欢迎纠错

SN54ACT74 数据手册

SN54ACT74, SN74ACT74

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH CLEAR AND PRESET

SCAS520E – AUGUST 1995 – REVISED JANUARY 2000

SN54ACT74 . . . J OR W PACKAGE

SN74ACT74 . . . D, DB, N, OR PW PACKAGE

Inputs Are TTL-Voltage Compatible

EPIC (Enhanced-Performance Implanted

(TOP VIEW)

CMOS) 1-µm Process

1CLR

2CLR

Package Options Include Plastic

Small-Outline (DW) Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK) and

Flatpacks (W), and Standard Plastic (N) and

Ceramic (J) DIPs

1CLK

1PRE

2CLK

2PRE

GND

description

SN54ACT74 . . . FK PACKAGE

(TOP VIEW)

The ’ACT74 dual positive-edge-triggered devices

are D-type flip-flops.

Alowlevelatthepreset(PRE)orclear(CLR)input

sets or resets the outputs, regardless of the levels

of the other inputs. When PRE and CLR are

inactive (high), data at the data (D) input meeting

the setup-time requirements is transferred to the

outputs on the positive-going edge of the clock

pulse. Clock triggering occurs at a voltage level

and is not directly related to the rise time of the

clock pulse. Following the hold-time interval, data

at D can be changed without affecting the levels

at the outputs.

20 19

1CLK

2CLK

1PRE

2PRE

9 10 11 12 13

The SN54ACT74 is characterized for operation

over the full military temperature range of –55°C

to 125°C. The SN74ACT74 is characterized for

operation from –40°C to 85°C.

NC – No internal connection

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUTS

CLR

PRE

CLK

†

↑

†

This configuration is unstable; that is, it does not

persist when either PRE or CLR returns to its

inactive (high) level.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6

中文翻译

下载PDF

SN54ACT74 替代型号

型号	品牌	替代类型	描述	数据表
SN74ACT74	TI	功能相似	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

与SN54ACT74相关器件

型号	品牌	获取价格	描述	数据表
SN54ACT74_06	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54ACT74FK	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54ACT74J	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54ACT74W	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54ACT7811	TI	获取价格	1024 】 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN54ACT7811GB	TI	获取价格	1024 】 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN54ACT7811HV	TI	获取价格	1024 】 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN54ACT7881	TI	获取价格	1024 】 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN54ACT7881HV	TI	获取价格	1024 】 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN54ACT7881HVR	TI	获取价格	1KX18 OTHER FIFO, 13ns, CQFP68, CERAMIC, QFP-68

与SN54ACT74相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

8
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

4
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

30
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

13

产品中心

服务支持

精选活动

关于我们

帮助中心

SN54ACT74

SN54ACT74 数据手册

SN54ACT74 替代型号

与SN54ACT74相关器件

与SN54ACT74相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SN54ACT74

SN54ACT74 数据手册

SN54ACT74 替代型号

与SN54ACT74相关器件

与SN54ACT74相关文章

您还可以找

您在本页遇到什么问题？