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SCAS158D − JUNE 1990 − REVISED DECEMBER 1996
SN54ACT8999 . . . JT PACKAGE
SN74ACT8999 . . . DW OR NT PACKAGE
(TOP VIEW)
D
D
D
D
D
D
D
D
Members of theTexas Instruments
SCOPE Family of Testability Products
Compatible With the IEEE Standard 1149.1
(JTAG) Serial Test Bus
DTDI
OTMS
DCO
DCI
MCI
ID1
ID2
ID3
ID4
ID5
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Allow Partitioning of System Scan Paths
2
Can Be Cascaded Horizontally or Vertically
3
MCO
4
Select One of Four Secondary Scan Paths
to Be Included in a Primary Scan Path
DTDO
DTCK
GND
DTMS1
DTMS2
DTMS3
DTMS4
DTRST
TDO
5
6
Provide Communication Between Primary
and Remote Test Bus Controllers
7
V
8
CC
Include 8-Bit Programmable Binary Counter
to Count or Initiate Interrupt Signals
ID6
ID7
ID8
TRST
TDI
9
10
11
12
13
14
Include 8-Bit Identification Bus for Scan
Path Identification
D
Inputs Are TTL Compatible
TMS
TCK
D
EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
D
Package Options Include Plastic
SN54ACT8999 . . . FK PACKAGE
(TOP VIEW)
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
4
3
2 1 28 27 26
description
5
25 ID8
ID1
MCI
DCI
DTDI
OTMS
DCO
MCO
6
TRST
24
23
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The ’ACT8999 are members of the Texas
7
TDI
Instruments SCOPE testability integrated-
circuit family. This family of components facilitates
testing of complex circuit-board assemblies.
8
TCK
TMS
TDO
DTRST
9
10
11
The ’ACT8999 enhance the scan capability of TI’s
SCOPE family by allowing augmentation of a
system’s primary scan path with secondary scan
paths (SSPs), which can be individually selected
by the ’ACT8999 for inclusion in the primary scan
path. The device also provides buffering of test
signals to reduce the need for external logic.
12 13 14 15 16 17 18
By loading the proper values into the instruction register and data registers, the user can select one of four
secondary scan paths. This has the effect of shortening the scan path to allow maximum test throughput when
an individual subsystem (board or box) is to be tested. Any of the device’s six data registers or the instruction
register can be placed in the device’s scan path, i.e., placed between test data input (TDI) and test data output
(TDO) for subsequent shift and scan operations.
All operations of the device except counting are synchronous to the test clock (TCK). The 8-bit programmable
up/down counter can be used to count transitions on the device condition input (DCI) and output interrupt signals
via the device condition output (DCO). The device can be configured to count on either the rising or falling edge
of DCI.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SCOPE and EPIC are trademarks of Texas Instruments Incorporated.
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Copyright 1996, Texas Instruments Incorporated
ꢐ ꢠ ꢫ ꢣ ꢢꢮ ꢩꢨ ꢦꢧ ꢨꢢ ꢤꢫ ꢭꢟ ꢥꢠ ꢦ ꢦꢢ ꢝꢓ ꢏꢋ ꢌꢑ ꢴ ꢋꢵꢇꢂ ꢵꢂꢉ ꢥꢭꢭ ꢫꢥ ꢣ ꢥ ꢤꢪ ꢦꢪꢣ ꢧ ꢥ ꢣ ꢪ ꢦꢪ ꢧꢦꢪ ꢮ
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ꢩ ꢠꢭ ꢪꢧꢧ ꢢ ꢦꢯꢪ ꢣ ꢱꢟ ꢧꢪ ꢠ ꢢꢦꢪ ꢮꢘ ꢐ ꢠ ꢥꢭ ꢭ ꢢ ꢦꢯꢪ ꢣ ꢫꢣ ꢢ ꢮꢩꢨ ꢦꢧ ꢉ ꢫꢣ ꢢ ꢮꢩꢨ ꢦꢟꢢ ꢠ
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1
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POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
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