ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈ ꢉ ꢀꢁꢊ ꢃꢄ ꢅꢆ ꢇꢈ
ꢆ ꢋꢌꢍ ꢎꢏ ꢐ ꢑꢌꢁ ꢍꢒꢆ ꢍꢓ ꢀꢌ ꢆ ꢌꢔꢏ ꢑꢁꢄꢁꢕ ꢖ ꢄꢆꢏ ꢀ
SCAS526C − AUGUST 1995 − REVISED OCTOBER 2003
D
D
4.5-V to 5.5-V V
Operation
D
D
Max t of 9.5 ns at 5 V
pd
Inputs Are TTL-Voltage Compatible
CC
Inputs Accept Voltages to 5.5 V
SN54ACT10 . . . FK PACKAGE
(TOP VIEW)
SN54ACT10 . . . J OR W PACKAGE
SN74ACT10 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
1A
1B
2A
2B
2C
V
CC
3
2
1
20 19
18
1C
1Y
3A
3B
3C
3Y
1Y
NC
3A
NC
3B
2A
NC
2B
4
5
6
7
8
17
16
15
14
NC
2C
2Y
GND
8
9 10 11 12 13
NC − No internal connection
description/ordering information
The ’ACT10 devices contain three independent 3-input NAND gates. The devices perform the Boolean
functions Y = A • B • C or Y = A + B + C in positive logic.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
SOIC − D
Tube
SN74ACT10N
SN74ACT10N
Tube
SN74ACT10D
ACT10
Tape and reel
Tape and reel
Tape and reel
Tube
SN74ACT10DR
SN74ACT10NSR
SN74ACT10DBR
SN74ACT10PW
SN74ACT10PWR
SNJ54ACT10J
SNJ54ACT10W
SNJ54ACT10FK
SOP − NS
ACT10
AD10
−40°C to 85°C
SSOP − DB
TSSOP − PW
AD10
Tape and reel
Tube
CDIP − J
CFP − W
LCCC − FK
SNJ54ACT10J
SNJ54ACT10W
SNJ54ACT10FK
Tube
−55°C to 125°C
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
H
L
B
H
X
L
C
H
X
X
L
L
H
H
H
X
X
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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