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SN10KHT5573

更新时间： 2024-11-29 11:58:39
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
7页 119K
描述
OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE TRANSPARENT LATCHES AND 3-STATE OUTPUTS

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SN10KHT5573 数据手册

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SDZS015 − MAY 1990 − REVISED OCTOBER 1990  
DW OR NT PACKAGE  
(T0P VIEW)  
• 10KH Compatible  
• ECL and TTL Control Inputs  
• Noninverting Outputs  
1Q  
2Q  
3Q  
4Q  
1D  
2D  
3D  
4D  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
2
3
• Flow-Through Architecture Optimizes PCB  
4
Layout  
V
OE (TTL)  
5
CC  
• Center Pin V , V , and GND  
GND  
GND  
GND  
5Q  
6Q  
7Q  
V
CC EE  
6
EE  
Configurations Minimize High-Speed  
GND  
LE (ECL)  
5D  
6D  
7D  
7
Switching Noise  
8
9
• Package Options Include “Small Outline”  
Packages and Standard Plastic 300-mil  
DIPs  
10  
11  
12  
8Q  
8D  
description  
This octal ECL-to-TTL translator is designed to provide efficient translation between a 10KH ECL signal  
environment and a TTL signal environment. This device is designed specifically to improve the performance  
and density of ECL-to-TTL CPU/bus-oriented functions such as memory address drivers, clock drivers, and  
bus-oriented receivers and transmitters.  
The eight latches of the SN10KHT5573 are transparent D-type latches. While latch enable (LE) is low, the Q  
outputs follow the data (D) inputs. When LE is high, the Q outputs are latched at the levels that were set up at  
the D inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive  
the bus lines significantly. The high-impedance third state and increased drive provide the capability to drive bus  
lines without need for interface or pullup components. Output-enable OE does not affect the internal operations  
of the latches. Old data can be retained or new data can be entered while the outputs are off.  
The SN10KHT5573 is characterized for operation from 0° to 75°C.  
†
FUNCTION TABLE  
logic symbol  
OUTPUT  
CONTROL INPUT  
DATA  
OUTPUT  
(TTL)  
17  
ECL/TTL C1  
EN  
LE  
OE  
L
LE  
L
D
L
Q
L
20  
OE  
24  
1
2
L
L
H
X
X
H
1D ECL/TTL  
1Q  
2Q  
1D  
Q
0
23  
L
H
X
2D  
H
Z
22  
3
4
3D  
3Q  
4Q  
5Q  
6Q  
21  
4D  
9
16  
5D  
10  
11  
12  
15  
6D  
14  
7D  
7Q  
8Q  
13  
8D  
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
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Copyright 1990, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
1234567

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SN10KHT5573DW TI

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 		OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE TRANSPARENT LATCHED AND 3-STATE OUTPUTS 24-SOIC 0
SN10KHT5573DWR TI

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 		OCTAL ECL TO TTL TRANSLATOR, TRUE OUTPUT, PDSO24, SO-24
SN10KHT5573NT TI

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 		暂无描述
SN10KHT5574 TI

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 		OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE EDGE-TRIGGERED FLIP-FLOPS AND 3-STATE OUTPUTS
SN10KHT5574DW TI

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 		OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE EDGE-TRIGGERED FLIP-FLOPS AND 3-STATE OUTPUTS
SN10KHT5574NT TI

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 		OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE EDGE-TRIGGERED FLIP-FLOPS AND 3-STATE OUTPUTS
SN10KHT5574NTE4 TI

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SN10KHT5578 TI

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 		OCTAL TTL-TO-ECL TRANSLATOR WITH D-TYPE EDGE-TRIGGERED FLIP-FLOPS AND OUTPUT ENABLE
SN10KHT5578DW TI

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 		OCTAL TTL-TO-ECL TRANSLATOR WITH D-TYPE EDGE-TRIGGERED FLIP-FLOPS AND OUTPUT ENABLE
SN10KHT5578DWR TI

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 		TTL TO ECL TRANSLATOR, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24

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