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SN10KHT5578DWR PDF预览

SN10KHT5578DWR

更新时间: 2024-11-29 13:01:23
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
6页 93K
描述
TTL TO ECL TRANSLATOR, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24

SN10KHT5578DWR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP24,.4
针数:24Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.82
最大延迟:4 ns输入特性:STANDARD
接口集成电路类型:TTL TO ECL TRANSLATORJESD-30 代码:R-PDSO-G24
长度:15.4 mm标称负供电电压:-5.2 V
位数:8功能数量:1
端子数量:24最高工作温度:75 °C
最低工作温度:输出特性:OPEN-EMITTER WITH CUT-OFF
输出锁存器或寄存器:NONE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5,-5.2 V认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Level Translators
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:BIPOLAR温度等级:COMMERCIAL EXTENDED
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.5 mmBase Number Matches:1

SN10KHT5578DWR 数据手册

 浏览型号SN10KHT5578DWR的Datasheet PDF文件第2页浏览型号SN10KHT5578DWR的Datasheet PDF文件第3页浏览型号SN10KHT5578DWR的Datasheet PDF文件第4页浏览型号SN10KHT5578DWR的Datasheet PDF文件第5页浏览型号SN10KHT5578DWR的Datasheet PDF文件第6页 
SN10KHT5578  
OCTAL TTL-TO-ECL TRANSLATOR WITH D-TYPE  
EDGE-TRIGGERED FLIP-FLOPS AND OUTPUT ENABLE  
SDZS014A – APRIL 1990 – REVISED JANUARY 1999  
DW OR NT PACKAGE  
(TOP VIEW)  
10KH Compatible  
TTL Clock and ECL Control Inputs  
Noninverting Outputs  
1Q  
2Q  
1D  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
Flow-Through Architecture Optimizes PCB  
Layout  
2D  
2
3Q  
3D  
3
4Q  
4D  
4
Center Pin V , V , and GND Configurations  
CC EE  
Minimize High-Speed Switching Noise  
GND  
GND  
GND  
GND  
5Q  
6Q  
7Q  
8Q  
OE(ECL)  
5
V
6
CC  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015  
V
7
EE  
CLK(TTL)  
8
Package Options Include Plastic Small-Outline  
(DW) Package and Standard Plastic (NT) DIPs  
5D  
6D  
7D  
8D  
9
10  
11  
12  
description  
This octal TTL-to-ECL translator is designed to  
provide efficient translation between a TTL signal  
environment and a 10KH ECL signal environ-  
ment. This device is designed specifically to  
improve the performance and density of  
TTL-to-ECL CPU/bus-oriented functions such as  
memory address drivers, clock drivers, and  
bus-oriented receivers and transmitters.  
The eight flip-flops of the ’5578 are edge-triggered D-type flip-flops. On the positive transition of the clock, the  
Q outputs are set to the logic levels that were set up at the D inputs.  
The output-control input OE does not affect the internal operations of the flip-flops. Old data can be retained  
or new data can be entered while the outputs are off.  
The SN10KHT5578 is characterized for operation from 0°C to 75°C.  
FUNCTION TABLE  
OUTPUT  
(ECL)  
Q
INPUTS  
CLK  
OE  
D
L
L
L
H
X
X
L
H
L
L
X
Q
0
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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