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SMJ626162-15HKDM PDF预览

SMJ626162-15HKDM

更新时间： 2024-11-25 15:51:51
品牌 Logo 应用领域
MICROSS 动态存储器
页数 文件大小 规格书
42页 631K
描述
Synchronous DRAM, 1MX16, 9ns, CMOS, CDFP50, 0.650 INCH, CERAMIC, DFP-50

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SMJ626162-15HKDM 数据手册

 浏览型号SMJ626162-15HKDM的Datasheet PDF文件第2页浏览型号SMJ626162-15HKDM的Datasheet PDF文件第3页浏览型号SMJ626162-15HKDM的Datasheet PDF文件第4页浏览型号SMJ626162-15HKDM的Datasheet PDF文件第5页浏览型号SMJ626162-15HKDM的Datasheet PDF文件第6页浏览型号SMJ626162-15HKDM的Datasheet PDF文件第7页 
SMJ626162  
524288 BY 16-BIT BY 2-BANK  
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY  
SGMS737C – JULY 1997 – REVISED MARCH 1999  
HKD PACKAGE  
(TOP VIEW)  
Organization  
512K × 16 Bits × 2 Banks  
3.3-V Power Supply (±5% Tolerance)  
1
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
V
V
SS  
DQ15  
DQ14  
CC  
Two Banks for On-Chip Interleaving  
(Gapless Accesses)  
2
DQ0  
DQ1  
3
High Bandwidth – Up to 83-MHz Data Rates  
4
V
V
SSQ  
DQ13  
DQ12  
SSQ  
DQ2  
Read Latency Programmable to  
2 or 3 Cycles From Column-Address Entry  
5
6
DQ3  
7
Burst Sequence Programmable to Serial or  
Interleave  
V
V
CCQ  
DQ11  
DQ10  
CCQ  
DQ4  
8
9
DQ5  
Burst Length Programmable to 1, 2, 4, 8, or  
256 (Full Page)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
V
V
SSQ  
DQ9  
DQ8  
SSQ  
DQ6  
Chip Select and Clock Enable for Enhanced  
System Interfacing  
DQ7  
V
V
CCQ  
CCQ  
DQML  
Cycle-by-Cycle DQ-Bus Mask Capability  
With Upper- and Lower-Byte Control  
NC  
DQMU  
CLK  
CKE  
NC  
A9  
W
CAS  
RAS  
CS  
Autorefresh Capability  
4K Refresh (Total for Both Banks)  
High-Speed, Low-Noise, Low-Voltage TTL  
(LVTTL) Interface  
A11  
A10  
A0  
Power-Down Mode  
A8  
Pipeline Architecture  
A7  
Temperature Ranges:  
A1  
A6  
Operating, – 55°C to 125°C  
Storage, – 65°C to 150°C  
A2  
A5  
A3  
A4  
Performance Ranges:  
V
V
SS  
CC  
SYNCHRONOUS ACCESS TIME REFRESH  
CLOCK CYCLE  
TIME  
CLOCK TO  
OUTPUT  
TIME  
INTERVAL  
PIN NOMENCLATURE  
t
t
t
REF  
CK  
AC  
(MIN)  
(MIN)  
8ns  
9ns  
10ns  
(MAX)  
32ms  
32ms  
32ms  
A[0:10]  
Address Inputs  
’626162-12  
’626162-15  
12 ns  
15 ns  
20 ns  
A0–A10 Row Addresses  
A0–A7 Column Addresses  
A10 Automatic-Precharge Select  
Bank Select  
’626162-20  
Read latency = 3  
†
A11  
CAS  
CKE  
Column-Address Strobe  
Clock Enable  
description  
CLK  
System Clock  
CS  
Chip Select  
The SMJ626162 series of devices are  
16777216-bit synchronous dynamic random-  
access memory (SDRAM) devices organized as  
two banks of 524288 words with 16 bits per word.  
DQ[0:15]  
DQML, DQMU  
NC  
SDRAM Data Input/Data Output  
Data-Input/Data-Output Mask Enable  
No Connect  
Row-Address Strobe  
Power Supply (3.3-V Typical)  
Power Supply for Output Drivers  
(3.3-V Typical)  
RAS  
V
V
CC  
CCQ  
All inputs and outputs of the SMJ626162 series  
are compatible with the LVTTL interface.  
V
V
W
Ground  
Ground for Output Drivers  
Write Enable  
SS  
SSQ  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443  
1234567...42

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与SMJ626162-15HKDM相关器件

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SMJ626162-20DGE TI

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 		1MX16 SYNCHRONOUS DRAM, 10ns, PDSO50
SMJ626162-20DGEM TI

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 		1MX16 SYNCHRONOUS DRAM, PDSO50, 0.400 INCH, TSOP2-50
SMJ626162-20HKD TI

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 		1MX16 SYNCHRONOUS DRAM, 10ns, CDFP50, 0.650 INCH, CERAMIC, DFP-50
SMJ626162-20HKD MICROSS

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 		Synchronous DRAM, 1MX16, 10ns, CMOS, CDFP50, 0.650 INCH, CERAMIC, DFP-50
SMJ626162DGE TI

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 		1MX16 SYNCHRONOUS DRAM, 10ns, PDSO50
SMJ626162HKD TI

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 		1MX16 SYNCHRONOUS DRAM, 8ns, CDFP50, 0.650 INCH, CERAMIC, DFP-50
SMJ64C16-25FG TI

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 		IC,SRAM,4KX4,CMOS,LLCC,20PIN,CERAMIC
SMJ64C16-45JD TI

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 		IC,SRAM,4KX4,CMOS,DIP,20PIN,CERAMIC
SMJ64C256-45FGM TI

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 		64KX4 STANDARD SRAM, 45ns, CQCC28
SMJ64C256-45JDM TI

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 		64KX4 STANDARD SRAM, 45ns, CDIP24

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