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SM470R1B1M-HT PDF预览

SM470R1B1M-HT

更新时间： 2024-11-12 07:07:59
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德州仪器 - TI 闪存微控制器
页数 文件大小 规格书
67页 632K
描述
16/32-BIT RISC FLASH MICROCONTROLLER

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SM470R1B1M-HT 数据手册

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SM470R1B1M-HT  
www.ti.com  
SPNS155D –SEPTEMBER 2009–REVISED JUNE 2011  
16/32-BIT RISC FLASH MICROCONTROLLER  
–
Asynchronous/Isosynchronous Modes  
1
FEATURES  
–
Two High-End CAN Controllers (HECC)  
–
–
2
•
High-Performance Static CMOS Technology  
SM470R1x 16/32-Bit RISC Core ( ARM7TDMI™)  
32-Mailbox Capacity  
Fully Compliant With CAN Protocol,  
Version 2.0B  
•
–
–
–
–
60-MHz System Clock (Pipeline Mode)  
Independent 16/32-Bit Instruction Set  
Open Architecture With Third-Party Support  
Built-In Debug Module  
–
Five Inter-Integrated Circuit (I2C) Modules  
–
–
–
Multi-Master and Slave Interfaces  
Up to 400 Kbps (Fast Mode)  
7- and 10-Bit Address Capability  
•
Integrated Memory  
–
1M-Byte Program Flash  
Two Banks With 16 Contiguous Sectors  
•
High-End Timer Lite (HET)  
–
–
12 Programmable I/O Channels:  
12 High-Resolution Pins  
–
–
–
64K-Byte Static RAM (SRAM)  
Memory Security Module (MSM)  
JTAG Security Module  
–
–
–
High-Resolution Share Feature (XOR)  
High-End Timer RAM  
–
•
•
Operating Features  
64-Instruction Capacity  
–
–
Low-Power Modes: STANDBY and HALT  
Industrial Temperature Range  
•
•
External Clock Prescale (ECP) Module  
–
Programmable Low-Frequency External  
Clock (CLK)  
12-Channel, 10-Bit Multi-Buffered ADC  
(MibADC)  
470+ System Module  
–
–
–
–
–
–
–
–
32-Bit Address Space Decoding  
Bus Supervision for Memory/Peripherals  
Digital Watchdog (DWD) Timer  
Analog Watchdog (AWD) Timer  
Enhanced Real-Time Interrupt (RTI)  
Interrupt Expansion Module (IEM)  
System Integrity and Failure Detection  
ICE Breaker  
–
–
–
64-Word FIFO Buffer  
Single- or Continuous-Conversion Modes  
1.55-µs Minimum Sample and Conversion  
Time  
–
Calibration Mode and Self-Test Features  
•
•
Flexible Interrupt Handling  
Expansion Bus Module (EBM)  
•
•
Direct Memory Access (DMA) Controller  
32 Control Packets and 16 Channels  
–
–
Supports 8- and 16-Bit Expansion Bus  
Memory Interface Mappings  
42 I/O Expansion Bus Pins  
Zero-Pin Phase-Locked Loop (ZPLL)-Based  
Clock Module With Prescaler  
–
–
–
Multiply-by-4 or -8 Internal ZPLL Option  
ZPLL Bypass Mode  
•
46 Dedicated General-Purpose I/O (GIO) Pins  
and 47 Additional Peripheral I/Os  
•
•
Sixteen External Interrupts  
On-Chip Scan-Base Emulation Logic, IEEE  
Standard 1149.1 (1) (JTAG) Test-Access Port  
•
Twelve Communication Interfaces:  
–
–
–
Two Serial Peripheral Interfaces (SPIs)  
255 Programmable Baud Rates  
•
Available in KGD and HFQ Packages  
Three Serial Communication Interfaces  
(SCIs)  
–
224 Selectable Baud Rates  
(1) The test-access port is compatible with the IEEE Standard  
1149.1-1990, IEEE Standard Test-Access Port and Boundary  
Scan Architecture specification. Boundary scan is not  
supported on this device.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
ARM7TDMI is a trademark of Advanced RISC Machines Limited (ARM).  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009–2011, Texas Instruments Incorporated  
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SM470R1B1M-HT 替代型号

型号 品牌 替代类型 描述 数据表
TMS470R1B1M TI

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