Datasheet > SLD5N50S2

SLD5N50S2

更新时间： 2024-09-18 18:09:19

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美浦森 - Maplesemi		/
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中文翻译

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SLD5N50S2 数据手册

LEAD FREE

RoHS

SLD5N50S2 / SLU5N50S2

500V N-Channel MOSFET

General Description

Features

This Power MOSFET is produced using Maple semi‘s

advanced planar stripe DMOS technology.

- 5A, 500V, R_{DS(on) typ.}= 1.35Ω@V_GS= 10 V

- Low gate charge ( typical 10 nC)

- High ruggedness

- Fast switching

- 100% avalanche tested

- Improved dv/dt capability

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for high efficiency switched mode power supplies,

active power factor correction based on half bridge topology.

I-PAK

D-PAK

G D S

Absolute Maximum Ratings

T_C= 25°C unless otherwise noted

Symbol

Parameter

SLD5N50S2

SLU5N50S2

Units

Drain-Source Voltage

500

5.0

3.2

V_DSS

Drain Current

- Continuous (T_C= 25℃)

- Continuous (T_C= 100℃)

- Pulsed

I_D

(Note 1)

I_DM

V_GSS

EAS

I_AR

Drain Current

Gate-Source Voltage

(Note 2)

(Note 1)

(Note 3)

Single Pulsed Avalanche Energy

Avalanche Current

150

5.0

6.0

4.5

E_AR

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

Power Dissipation (T_C= 25℃)

V/ns

dv/dt

P_D

- Derate above 25℃

0.45

W/℃

℃

T_J, T_STG

Operating and Storage Temperature Range

-55 to +150

Maximum lead temperature for soldering purposes,

T_L

300

℃

1/8" from case for 5 seconds

* Drain current limited by maximum junction temperature.

Thermal Characteristics

Symbol

Parameter

Typ

Max

2.2

Units

℃

℃/W

Thermal Resistance, Junction-to-Case

Thermal Resistance, Case-to-Sink Typ.

Thermal Resistance, Junction-to-Ambient

R_θJC

R_θJS

100

R_θJA

Maple Semiconductor CO., LTD

http://www.meipusen.com

Rev. 00 Jan . 2019

12 3 4 5 6

中文翻译

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