Datasheet > SI53307-B-GMR

SI53307-B-GMR

更新时间： 2024-11-23 19:17:03

品牌	Logo	应用领域
芯科 - SILICON		驱动逻辑集成电路
页数	文件大小	规格书
32页	712K
描述
IC CLK BUFFER 2:4 725MHZ 16QFN

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中文翻译

获取价格

技术参数
数据手册
替代型号

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SI53307-B-GMR 技术参数

是否无铅：	不含铅	生命周期：	Active
包装说明：	,	Reach Compliance Code：	unknown
风险等级：	1.56	逻辑集成电路类型：	LOW SKEW CLOCK DRIVER
Base Number Matches：	1

SI53307-B-GMR 数据手册

Si53307

2:2 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR

Features



2 differential or 4 LVCMOS outputs

Ultra-low additive jitter: 45 fs rms

Wide frequency range: dc to

725 MHz



2:1 input mux with glitchless input

clock switching

Independent V_DDand V_DDO

1.8/2.5/3.3 V



Any-format input with pin selectable

output formats: LVPECL, low power

LVPECL, LVDS, CML, HCSL,

LVCMOS



Small size: 16-QFN (3 mm x 3 mm)

RoHS compliant, Pb-free

Industrial temperature range:

–40 to +85 °C



Synchronous output enable

Applications

Ordering Information:



High-speed clock distribution

Ethernet switch/router

Optical Transport Network (OTN)

SONET/SDH



Storage/Servers

Telecom

Industrial

SyncE, 1588

Backplane clock distribution

See page 27.

Pin Assignments

PCI Express Gen 1/2/3

Description

The Si53307 is an ultra-low jitter two output differential buffer with pin-selectable

output clock signal format and 2:1 input clock mux. The Si53307 utilizes Silicon

Labs' advanced CMOS technology to fanout clocks from dc to 725 MHz with

guaranteed low additive jitter, low skew, and low propagation delay variability. The

Si53307 features minimal cross-talk and provides superior supply noise rejection,

simplifying low jitter clock distribution in noisy environments. Independent core

and output bank supply pins provide integrated level translation without the need

for external circuitry.

V_DD

CLK1

GND

PAD

Functional Block Diagram

Power

Supply

VDD

Filtering

VDDO

SFOUT[1:0]

Patents pending

CLK0

CLK1

Switching

Logic

CLK_SEL

Rev. 1.1 3/16

Si53307

12 3 4 5 6 7...32

中文翻译

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SI53307-B-GMR 替代型号

型号	品牌	替代类型	描述	数据表
SI53307-B-GM	SILICON	完全替代	Low Skew Clock Driver, 53307 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, 3 X 3 M

与SI53307-B-GMR相关器件

型号	品牌	获取价格	描述	数据表
SI53308-B-GM	SILICON	获取价格	Low Skew Clock Driver, 53308 Series, 6 True Output(s), 0 Inverted Output(s), CMOS, 5 X 5 M
SI5330A-A00200-GM	SILICON	获取价格	Supports single-ended or differential input clock singnals Generates four differential (LV
SI5330A-A00200-GMR	SILICON	获取价格	Clock Driver
SI5330A-A00202-GM	SILICON	获取价格	1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR
SI5330A-B00200-GM	SILICON	获取价格	Low Skew Clock Driver, 5330 Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, ROHS
SI5330A-B00202-GM	SILICON	获取价格	Low Skew Clock Driver, 5330 Series, 4 True Output(s), 0 Inverted Output(s), QFN-24
SI5330B-A00204-GM	SILICON	获取价格	Supports single-ended or differential input clock singnals Generates four differential (LV
SI5330B-A00204-GMR	SILICON	获取价格	Clock Driver
SI5330B-A00205-GM	SILICON	获取价格	1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR
SI5330B-A00205-GMR	SILICON	获取价格	Clock Driver

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