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SI3400-X-GMR PDF预览

SI3400-X-GMR

更新时间: 2024-02-18 03:27:05
品牌 Logo 应用领域
芯科 - SILICON 接口集成电路
页数 文件大小 规格书
20页 452K
描述
Interface Circuit, 5 X 5 MM, ROHS COMPLIANT, MO-220VHHB-1, QFN-20

SI3400-X-GMR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:HVQCCN,
针数:20Reach Compliance Code:unknown
风险等级:5.62接口集成电路类型:INTERFACE CIRCUIT
JESD-30 代码:S-XQCC-N20长度:5 mm
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED座面最大高度:0.9 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5 mm
Base Number Matches:1

SI3400-X-GMR 数据手册

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Si3400/Si3401  
1. Electrical Specifications  
Table 1. Recommended Operating Conditions  
Description  
|CT1 – CT2| or |SP1 – SP2|  
Ambient Operating Temperature  
Symbol  
Min  
2.8  
Typ  
Max  
57  
Units  
V
VPORT  
TA  
–40  
25  
85  
°C  
Note: Unless otherwise noted, all voltages referenced to VNEG. All minimum and maximum specifications are guaranteed  
and apply across the recommended operating conditions. Typical values apply at nominal supply voltage and ambient  
temperature unless otherwise noted.  
Table 2. Absolute Maximum Ratings (DC)1  
Type  
Description  
Rating  
–60 to 60  
Unit  
Voltage  
CT1 to CT2  
SP1 to SP2  
–60 to 60  
2
VPOS  
–0.3 to 60  
–0.3 to 60  
–0.3 to 60  
–0.3 to 60  
–60 to 0.3  
–0.3 to 60  
–0.3 to 5  
HSO  
VSS1 or VSS2  
SWO  
2
PLOSS to VPOS  
RDET  
V
RCL  
2
SSFT to VPOS  
–5 to 0.3  
EROUT to VSS1, VSS2, or VSSA  
FB to VPOS  
–0.3 to VDD+0.3  
–5 to 0.3  
RIMAX to VSS1, VSS2, or VSSA  
VSS1 to VSS2 or VSSA  
–0.3 to VDD+0.3  
–0.3 to 0.3  
–0.3 to 5  
VDD to VSS1, VSS2, or VSSA  
Notes:  
1. Unless otherwise noted, all voltages referenced to VNEG. Permanent device damage may occur if the maximum  
ratings are exceeded. Functional operation should be restricted to those conditions specified in the operational sections  
of this data sheet. Exposure to absolute maximum rating conditions for extended periods may adversely affect device  
reliability.  
2. VPOS is equal to VPOSF and VPOSS tied together for test condition purposes.  
4
Preliminary Rev. 0.91  

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