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SI2415-FSR PDF预览

SI2415-FSR

更新时间: 2024-11-22 06:13:27
品牌 Logo 应用领域
芯科 - SILICON /
页数 文件大小 规格书
74页 971K
描述
Modem,

SI2415-FSR 数据手册

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Si2457/34/15/04  
®
V.90, V.34, V.32BIS, V.22BIS ISOMODEM WITH GLOBAL DAA  
Features  
Data modem formats  
Integrated DAA  
ITU-T, Bell  
Over 6000 V Capacitive isolation  
Parallel phone detect  
300 bps up to 56 kbps  
V.21,V.22, V.29 Fast Connect  
V.42, V.42bis, MNP2-5  
Automatic rate negotiation  
Globally-compliant line interface  
Overcurrent detection  
27 MHz clock input  
3.3 V power  
Type I and II caller ID decode  
No external ROM or RAM required  
UART or parallel interface  
AT command set support  
SMS / MMS support  
Ordering Information  
Firmware upgradeable  
EEPROM interface  
This data sheet is valid only for  
those chipset combinations listed  
on page page 70.  
Lead-free, RoHS Compliant  
Packages  
Applications  
Pin Assignments  
Set-top boxes  
Digital video recorder  
Digital televisions  
Remote monitoring  
Point-of-sale terminals  
Text/video telephones  
Si2457/34/15/04  
(16-Pin Option)  
Description  
1
CLKIN/XTALI  
XTALO  
16 RTS  
2
3
4
15 DCD  
®
RI  
VD  
ESC  
13 VA  
14  
The ISOmodem family of products is a complete modem ranging in  
speed from 56,000 bps to 2400 bps. Offered as a chipset with the Si2457,  
Si2434, Si2415, or Si2404 system-side device and the Si3018/10 line-  
side device, the ISOmodem utilizes Silicon Laboratories’ patented Direct  
Access Arrangement (DAA) technology to provide a programmable  
telephone line interface with an unparalleled level of integration. These  
compact solutions eliminate the need for a separate DSP, modem  
controller, codec, transformer, relay, opto-isolators, clocking crystal, and  
2-4 wire hybrid. Available with a system-side packaging option of either a  
16-pin SOIC or a 24-pin TSSOP, these devices are ideal for embedded  
modem applications due to their flexibility, small footprint, and minimal  
external component count.  
RXD  
TXD  
CTS  
5
6
7
8
GND  
INT  
C1A  
C2A  
12  
11  
10  
9
RESET  
Si2457/34/15/04  
(24-Pin Option)  
24  
23  
22  
21  
20 GND  
19  
CLKIN/XTALI  
XTALO  
CLKOUT/EECS/A0  
FSYNC/D6  
VD3.3  
1
2
3
4
5
6
7
8
SDO/EECLK/D5  
DCD/D4  
ESC/D3  
VD3.3  
VDB  
SDI/EESD/D2  
GND  
VDA  
RTS/D7  
RXD/RD  
TXD/WR  
18  
Functional Block Diagram  
17 RI/D1  
16  
15 AOUT/INT  
INT/DO  
9
10  
CLKIN/XTALI  
XTALO  
14  
13  
C1A  
C2A  
CTS/CS 11  
RESET 12  
PLL  
CLKOUT  
Clocking  
RAM/ROM  
Data Bus  
RXD  
TXD  
CTS  
RTS  
DCD  
ESC  
RI  
Si3018/10  
QE  
DCT  
RX  
IB  
DCT2  
IGND  
DCT3  
QB  
1
2
3
4
16  
15  
14  
13  
Serial  
Interface  
DAA  
To Phone Line  
Microcontroller  
DSP  
Interface  
C1B  
C2B  
VREG  
RNG1  
QE2  
SC  
VREG2  
RNG2  
5
6
7
12  
11  
10  
9
INT  
AOUT  
ISOB  
CS  
WR  
8
Parallel  
RD  
Interface  
A0  
D0-D7  
RESET  
Rev. 1.0 2/05  
Copyright © 2005 by Silicon Laboratories  
Si2457/34/15/04  
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.  

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