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SCG4525 PDF预览

SCG4525

更新时间: 2024-11-21 21:22:03
品牌 Logo 应用领域
CONNOR-WINFIELD 驱动逻辑集成电路
页数 文件大小 规格书
16页 2334K
描述
PLL Based Clock Driver, 4000/14000/40000 Series, 1 True Output(s), 1 Inverted Output(s), 1 X 1.025 INCH, 0.45 INCH HEIGHT, SMT-18

SCG4525 数据手册

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SCG4525  
Synchronous Clock  
Generators  
PLL  
2111 Comprehensive Drive  
Aurora, Illinois 60505  
Phone: 630-851-4722  
Fax: 630-851-5040  
www.conwin.com  
Features  
LVPECL Output Frequencies @ 155.52 MHz  
or 77.76 MHz  
• CMOS Output Frequency @ 77.76 MHz  
• Phase Locked Output Frequency Control  
• Intrinsically Low Jitter Crystal Oscillator  
LVPECL Outputs with Disable Function  
• Dual Input References  
• LOR & LOL combined alarm output  
• Force Free Run Function  
• Automatic Free Run operation on loss of both  
References A & B  
Bulletin  
SG069  
Page  
1 of 16  
• Input Duty Cycle Tolerant  
• 3.3V dc Power Supply  
• Small Size: 1 Square Inch  
Revision  
P00  
Date  
06 FEB 03  
Issued By  
MBatts  

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