Datasheet > SCG4525-155.520M

SCG4525-155.520M

更新时间： 2024-02-07 14:43:27

品牌	Logo	应用领域
CONNOR-WINFIELD		/
页数	文件大小	规格书
16页	2335K
描述
PLL/Frequency Synthesis Circuit

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中文翻译

获取价格

技术参数
数据手册

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SCG4525-155.520M 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.72
Base Number Matches：	1

SCG4525-155.520M 数据手册

SCG4525

Synchronous Clock

Generators

PLL

2111 Comprehensive Drive

Aurora, Illinois 60505

Phone: 630-851-4722

Fax: 630-851-5040

www.conwin.com

Features

• LVPECL Output Frequencies @ 155.52 MHz

or 77.76 MHz

• CMOS Output Frequency @ 77.76 MHz

• Phase Locked Output Frequency Control

• Intrinsically Low Jitter Crystal Oscillator

• LVPECL Outputs with Disable Function

• Dual Input References

• LOR & LOL combined alarm output

• Force Free Run Function

• Automatic Free Run operation on loss of both

References A & B

Bulletin

SG069

Page

1 of 16

• Input Duty Cycle Tolerant

• 3.3V dc Power Supply

• Small Size: 1 Square Inch

Revision

P00

Date

06 FEB 03

Issued By

MBatts

12 3 4 5 6 7...16

中文翻译

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