Datasheet > 微控制器和处理器 > 串行 IO/通信控制器> SC16C852VIET

SC16C852VIET

更新时间： 2024-01-31 09:19:01

品牌	Logo	应用领域
恩智浦 - NXP		微控制器和处理器串行IO控制器通信控制器外围集成电路先进先出芯片数据传输时钟
页数	文件大小	规格书
54页	254K
描述
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface

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技术参数
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SC16C852VIET 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	FBGA, BGA36,6X6,20	Reach Compliance Code：	unknown
风险等级：	5.84	JESD-30 代码：	S-PBGA-B36
端子数量：	36	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	FBGA	封装等效代码：	BGA36,6X6,20
封装形状：	SQUARE	封装形式：	GRID ARRAY, FINE PITCH
电源：	1.8 V	认证状态：	Not Qualified
子类别：	Serial IO/Communication Controllers	标称供电电压：	1.8 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	BALL
端子节距：	0.5 mm	端子位置：	BOTTOM
uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	Base Number Matches：	1

SC16C852VIET 数据手册

SC16C852V

1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared

(IrDA), and XScale VLIO bus interface

Rev. 03 — 15 October 2007

Product data sheet

1. General description

The SC16C852V is a 1.8 V, low power dual channel Universal Asynchronous Receiver

and Transmitter (UART) used for serial data communications. Its principal function is to

convert parallel data into serial data and vice versa. The UART can handle serial data

rates up to 5 Mbit/s. SC16C852V can be programmed to operate in extended mode where

additional advanced UART features are available (see Section 6.2). The SC16C852V

family UART provides enhanced UART functions with 128-byte FIFOs, modem control

interface, DMA mode data transfer, and IrDA encoder/decoder. On-board status registers

provide the user with error indications and operational status. System interrupts and

modem control features may be tailored by software to meet speciﬁc user requirements.

An internal loopback capability allows on-board diagnostics. Independent programmable

baud rate generators are provided to select transmit and receive baud rates.

The SC16C852V with Intel XScale processor VLIO interface operates at 1.8 V and is

available in HVQFN48 and TFBGA36 packages.

2. Features

I Dual channel high performance UART

I 1.8 V operation

I Advanced packages: HVQFN and TFBGA

I Up to 5 Mbit/s data rate at 1.8 V

I 128-byte transmit FIFO to reduce the bandwidth requirement of the external CPU

I 128-byte receive FIFO with error ﬂags to reduce the bandwidth requirement of the

external CPU

I 128 programmable Receive and Transmit FIFO interrupt trigger levels

I 128 Receive and Transmit FIFO reporting levels (level counters)

I Automatic software (Xon/Xoff) and hardware (RTS/CTS or DTR/DSR) ﬂow control

I Programmable Xon/Xoff characters

I 128 programmable hardware and software trigger levels

I Automatic 9-bit mode (RS-485) address detection

I Automatic RS-485 driver turn-around with programmable delay

I Dual channel concurrent write

I UART software reset

I High resolution clock prescaler, from 0 to 15 with granularity of ¹⁄₁₆to allow

non-standard UART clock to be used

I Industrial temperature range (−40 °C to +85 °C)

I Software compatible with industry standard SC16C652B

12 3 4 5 6 7...54

中文翻译

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与SC16C852VIET相关器件

型号	品牌	获取价格	描述	数据表
SC16C852VIET,151	NXP	获取价格	SC16C852V - 1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA) and XSca
SC16C852VIET,515	NXP	获取价格	SC16C852V - 1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA) and XSca
SC16C852VIET,557	NXP	获取价格	SC16C852V - 1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA) and XSca
SC16DP-19	ETC	获取价格	Drop Wire Clamps for CATV and Telephone Cable
SC16DP-26	ETC	获取价格	Drop Wire Clamps for CATV and Telephone Cable
SC16DP-3Q	ETC	获取价格	Drop Wire Clamps for CATV and Telephone Cable
SC16IS740	NXP	获取价格	Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR b
SC16IS740_11	NXP	获取价格	Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs
SC16IS740IPW	NXP	获取价格	Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR b
SC16IS740IPW,112	NXP	获取价格	SC16IS740/750/760 - Single UART with I2C-bus/SPI interface, 64 bytes of transmit and recei

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