Datasheet > SC16C754BIA68-S

SC16C754BIA68-S

更新时间： 2023-02-26 13:48:27

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
51页	253K
描述
IC,UART,LDCC,68PIN,PLASTIC

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数据手册

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SC16C754BIA68-S 数据手册

SC16C754B

5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte

FIFOs

Rev. 04 — 6 October 2008

Product data sheet

1. General description

The SC16C754B is a quad Universal Asynchronous Receiver/Transmitter (UART) with

64-byte FIFOs, automatic hardware/software ﬂow control, and data rates up to 5 Mbit/s

(3.3 V and 5 V). The SC16C754B offers enhanced features. It has a Transmission Control

hardware and software ﬂow control. With the FIFO Ready (FIFO Rdy) register, the

software gets the status of TXRDY/RXRDY for all four ports in one access. On-chip status

registers provide the user with error indications, operational status, and modem interface

control. System interrupts may be tailored to meet user requirements. An internal

loopback capability allows on-board diagnostics.

The UART transmits data, sent to it over the peripheral 8-bit bus, on the TX signal and

receives characters on the RX signal. Characters can be programmed to be 5, 6, 7, or

8 bits. The UART has a 64-byte receive FIFO and transmit FIFO and can be programmed

to interrupt at different trigger levels. The UART generates its own desired baud rate

based upon a programmable divisor and its input clock. It can transmit even, odd, or no

parity and 1, 1.5, or 2 stop bits. The receiver can detect break, idle, or framing errors,

FIFO overﬂow, and parity errors. The transmitter can detect FIFO underﬂow. The UART

also contains a software interface for modem control operations, and has software ﬂow

control and hardware ﬂow control capabilities.

The SC16C754B is available in plastic LQFP64, LQFP80 and PLCC68 packages.

2. Features

I 4 channel UART

I 5 V, 3.3 V and 2.5 V operation

I Pin compatible with SC16C654IA68, TL16C754, and SC16C554IA68 with additional

enhancements, and software compatible with TL16C754

I Up to 5 Mbit/s data rate (at 3.3 V and 5 V; at 2.5 V maximum data rate is 3 Mbit/s)

I 5 V tolerant on input only pins¹

I 64-byte transmit FIFO

I 64-byte receive FIFO with error ﬂags

I Industrial temperature range (−40 °C to +85 °C)

I Programmable and selectable transmit and receive FIFO trigger levels for DMA and

interrupt generation

1. For data bus pins D7 to D0, see Table 24 “Limiting values”.

12 3 4 5 6 7...51

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与SC16C754BIA68-S相关器件

型号	品牌	获取价格	描述	数据表
SC16C754BIB80	NXP	获取价格	5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
SC16C754BIB80,528	NXP	获取价格	SC16C754B - 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs QFP 80-Pin
SC16C754BIB80,551	NXP	获取价格	SC16C754B - 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs QFP 80-Pin
SC16C754BIB80,557	NXP	获取价格	SC16C754B - 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs QFP 80-Pin
SC16C754BIB80-S	NXP	获取价格	IC,UART,QFP,80PIN,PLASTIC
SC16C754BIB80-T	NXP	获取价格	5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
SC16C754BIBM	NXP	获取价格	5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
SC16C754BIBM,128	NXP	获取价格	SC16C754B - 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs QFP 64-Pin
SC16C754BIBM,151	NXP	获取价格	SC16C754B - 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs QFP 64-Pin
SC16C754BIBM,157	NXP	获取价格	SC16C754B - 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs QFP 64-Pin

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