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SC16C2550B

更新时间： 2024-11-17 21:54:47

品牌	Logo	应用领域
恩智浦 - NXP		先进先出芯片
页数	文件大小	规格书
42页	194K
描述
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs

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SC16C2550B 数据手册

SC16C2550B

5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with

16-byte FIFOs

Rev. 02 — 14 December 2004

Product data

1. Description

The SC16C2550B is a two channel Universal Asynchronous Receiver and

Transmitter (UART) used for serial data communications. Its principal function is to

convert parallel data into serial data and vice versa. The UART can handle serial data

rates up to 5 Mbit/s.

The SC16C2550B is pin compatible with the ST16C2550. It will power-up to be

functionally equivalent to the 16C2450. The SC16C2550B provides enhanced UART

functions with 16-byte FIFOs, modem control interface, DMA mode data transfer. The

DMA mode data transfer is controlled by the FIFO trigger levels and the TXRDY and

RXRDY signals. On-board status registers provide the user with error indications and

operational status. System interrupts and modem control features may be tailored by

software to meet speciﬁc user requirements. An internal loop-back capability allows

on-board diagnostics. Independent programmable baud rate generators are provided

to select transmit and receive baud rates.

The SC16C2550B operates at 5 V, 3.3 V and 2.5 V and the Industrial temperature

range, and is available in plastic PLCC44, LQFP48 and DIP40 packages.

2. Features

■ 2 channel UART

■ 5 V, 3.3 V and 2.5 V operation

■ Industrial temperature range

■ Pin and functionally compatible to 16C2450 and software compatible with

INS8250, SC16C550

■ Up to 5 Mbit/s data rate at 5 V and 3.3 V, and 3 Mbit/s at 2.5 V

■ 16 byte transmit FIFO to reduce the bandwidth requirement of the external CPU

■ 16 byte receive FIFO with error ﬂags to reduce the bandwidth requirement of the

external CPU

■ Independent transmit and receive UART control

■ Four selectable Receive FIFO interrupt trigger levels

■ Software selectable Baud Rate Generator

■ Standard asynchronous error and framing bits (Start, Stop, and Parity Overrun

Break)

■ Transmit, Receive, Line Status, and Data Set interrupts independently controlled

12 3 4 5 6 7...42

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与SC16C2550B相关器件

型号	品牌	获取价格	描述	数据表
SC16C2550B_07	NXP	获取价格	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
SC16C2550BIA44	NXP	获取价格	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
SC16C2550BIA44,512	NXP	获取价格	SC16C2550B - 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs LCC 44-Pi
SC16C2550BIA44,518	NXP	获取价格	SC16C2550B - 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs LCC 44-Pi
SC16C2550BIA44,529	NXP	获取价格	SC16C2550B - 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs LCC 44-Pi
SC16C2550BIA44-S	NXP	获取价格	IC,UART,CMOS,LDCC,44PIN,PLASTIC
SC16C2550BIA44-T	NXP	获取价格	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs - Channel: 2 ; Data tr
SC16C2550BIB48	NXP	获取价格	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
SC16C2550BIB48,128	NXP	获取价格	SC16C2550B - 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs QFP 48-Pi
SC16C2550BIB48,151	NXP	获取价格	SC16C2550B - 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs QFP 48-Pi

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