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SC-601 PDF预览

SC-601

更新时间: 2024-09-17 06:10:15
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其他 - ETC /
页数 文件大小 规格书
8页 259K
描述
Speech And Music Processor

SC-601 数据手册

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SC-601  
Speech And Music Processor  
Data sheet  
Features  
Advanced, integrated speech synthesizer for  
high-quality sound.  
640-Word RAM  
32 I/O Pins consisting of: 24 general purpose  
bit configurable I/O, 8 inputs with programmable  
pullup resistor and a dedicated interrupt (Key-  
Scan)  
Operates up to 12.32 MHz (Performs up to 12  
MIPS)  
Single chip solution for up to 24 Minutes of  
speech (using 1.57 Mb of onboard program +  
data ROM)  
Direct Speaker Driver, 32(PDM)  
One-bit  
comparator with edge-detection  
Supports high-quality synthesis algorithms  
Such as MX, CX, Simple CX, LX, ADPCM, and  
Polyphonic Music  
interrupt service  
Resistor-trimmed oscillator or 32.768kHz crystal  
reference oscillator  
Simultaneous speech plus music capabilities  
Very low-power operation, ideal for handheld  
devices  
Serial scan port for in-circuit emulation and  
diagnostics  
The SC-601 is sold in die form or 100-pin LQFP  
package.  
Low-voltage operation, sustainable by three  
batteries  
An emulator device is available in a ceramic  
package for development (SC-614-P).  
Reduced power stand-by modes, less than 10  
µA in deep-sleep mode  
Description  
The SC-601 is  
a
low-cost, mixed-signal  
SC-601 Block Diagram  
processor that combines a speech synthesizer,  
general-I/O, onboard ROM, and direct speaker  
drive in a single package. The computational  
unit utilizes a powerful DSP which gives the SC-  
601 unprecedented speed and computational  
flexibility compared with previous devices of its  
type. The SC-601 supports a variety of speech  
and audio coding algorithms, providing range of  
options for speech duration and sound quality.  
16-Bit  
10-Bit  
DAC  
Microprocessor  
640-words  
RAM  
TIMER 1  
TIMER 2  
PLLM  
32 I/O  
192 KBytes  
ROM  
COMPARATOR  
The device consists of a micro-DSP core,  
embedded program, and data memory, and a  
self-contained generation system. General-  
purpose periphery is comprised of 32 bits of partially configurable I/O.  
The core processor is a general-purpose 16-bit microcontroller with DSP capability. The basic core includes  
computational unit (CU), data address unit, program address unit, two timers, eight level interrupt processor,  
and several system and control registers. The core processor gives the SC-601 break-capability in emulation.  
The processor is Harvard type for efficient DSP algorithm execution. It requires separate program and memory  
blocks to permit simultaneous access. The ROM has a protection scheme to prevent third-party pirating. It is  
configured in 32K 17-bit words.  
The total ROM space is divided into three areas:  
1. The lower 2K words are reserved by Sensory a built-in self-test  
2. The upper 30K words are for user program/data  
3. An additional 1 Mb data ROM provides for up to 24 minutes of speech.  
© 2002 Sensory Inc.  
P/N 80-0207-A  
1

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