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S3078PB PDF预览

S3078PB

更新时间: 2024-11-07 19:55:15
品牌 Logo 应用领域
AMCC ATM异步传输模式电信信息通信管理电信集成电路
页数 文件大小 规格书
2页 39K
描述
Clock Recovery Circuit, 1-Func, BICMOS, PBGA81, PLASTIC, BGA-81

S3078PB 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:LBGA, BGA81,9X9,40
针数:81Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.9
应用程序:SONETJESD-30 代码:S-PBGA-B81
JESD-609代码:e0长度:10 mm
功能数量:1端子数量:81
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LBGA
封装等效代码:BGA81,9X9,40封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE电源:3.3 V
认证状态:Not Qualified座面最大高度:1.7 mm
子类别:ATM/SONET/SDH ICs最大压摆率:285 mA
标称供电电压:3.3 V表面贴装:YES
技术:BICMOS电信集成电路类型:ATM/SONET/SDH CLOCK RECOVERY CIRCUIT
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM宽度:10 mm
Base Number Matches:1

S3078PB 数据手册

 浏览型号S3078PB的Datasheet PDF文件第2页 
MyAMCC - Product Summary  
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S3078  
Documents*  
3.3v OC-48 multi-rate CDR with FEC and Limiting Amp  
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General Description  
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The S3078 is a 3.3 V combined limiting amplifier and Clock Recovery Unit  
(CRU) for multi-rate applications. The figure below shows a typical network  
application.  
Products  
The internal limiting amplifier provides a voltage limited signal into the CRU  
for inputs down to 5 mV. It has a Loss-of-Signal (LOS) output, which can be  
programmed to assert with input levels between 25 mVp-p and 60 mVp-p.  
There is also an offset correction function that reduces pulse-width distortion.  
PHY/PMD  
S3086  
S3076  
S3170  
S3160  
The CRU is implemented using AMCC's proven on-chip Phase Locked Loop  
(PLL) technology, and it can lock onto OC-48, OC-24, OC-12, GBE, FC, or OC-  
3 scrambled NRZ signal with FEC capability up to 8 bytes per 255-byte block,  
and recovers the clock from the data. It consists of a phase detector, a loop  
filter, and a Voltage Controlled Oscillator (VCO). The phase detector  
compares the phase relationship between the VCO output and the serial data  
input. A loop filter converts the phase detector output into a smooth DC  
voltage, and the DC voltage is input into the VCO whose frequency is varied  
by this voltage.  
Features  
SiGe BiCMOS Technology  
+3.3 V Power Supply  
Integrated Limiting Amplifier  
No Degradation in Jitter Tolerance down to 5 mV Input  
Loss-of-Signal Detection  
Supports Clock Recovery for:  
- OC-48 (2488.32 Mbps) with FEC  
- OC-24 (1244.16 Mbps) with FEC  
- OC-12 (622.08 Mbps) with FEC  
- OC-3 (155.52 Mbps) with FEC NRZ data  
- Gigabit Ethernet (GBE) (1250 Mbps) with FEC  
- Fibre Channel (FC) (1062.5 Mbps) with FEC  
- Fibre Channel (FC) (2125 Mbps) with FEC  
Lock Detect monitors frequency of incoming data  
- Selectable reference frequencies  
- 155.52 MHz - 166.62 MHz or  
- 19.44 MHz - 20.83 MHz  
Typical power 730 mW  
81 Pin PBGA package and Die  
S3078 - Typical Network Application  
file:///C|/Documents%20and%20Settings/tamerz/Deskto...S-G16%20-%201A%20Switching%20Regulator%20Module.htm (1 of 2)6/28/2005 1:34:00 PM  

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