Datasheet > S3005B-6

S3005B-6

更新时间： 2024-02-06 08:56:34

品牌	Logo	应用领域
AMCC		电信电信集成电路
页数	文件大小	规格书
28页	280K
描述
TRANSCEIVER, UUC, DIE

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中文翻译

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技术参数
数据手册

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S3005B-6 技术参数

生命周期：	Obsolete	零件包装代码：	DIE
包装说明：	DIE,	Reach Compliance Code：	unknown
风险等级：	5.82	JESD-30 代码：	X-XUUC-N
负电源额定电压：	-4.5 V	功能数量：	1
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	DIE
封装形状：	UNSPECIFIED	封装形式：	UNCASED CHIP
认证状态：	Not Qualified	标称供电电压：	5 V
表面贴装：	YES	电信集成电路类型：	TRANSCEIVER
温度等级：	INDUSTRIAL	端子形式：	NO LEAD
端子位置：	UPPER	Base Number Matches：	1

S3005B-6 数据手册

SONET/SDH OC-3/12 TRANSMITTER AND RECEIVER

S3005/S3006

Clock Synthesizer

Timing Generator

The Timing Generator function, seen in Figure 4, pro-

vides two separate functions. It provides a byte rate

version of the TSCLK, and a mechanism for aligning

the phase between the incoming byte clock and the

clock which loads the parallel-to-serial shift register.

The Clock Synthesizer, shown in the block diagram

in Figure 4, is a monolithic PLL that generates the

serial output clock phase synchronized with the input

reference clock (REFCLK). There are three select-

able output clock frequencies that are synthesizable

from any of four selectable reference frequencies for

SONET/SDH operation.

The PCLK output is a byte rate version of TSCLK.

For STS-12, the PCLK frequency is 77.76 MHz, and

for NRZ or CMI coded STS-3, its frequency is 19.44

MHz. For CMI coded E4, its frequency is 17.408

MHz. PCLK is intended for use as a byte speed clock

for upstream multiplexing and overhead processing

circuits. Using PCLK for upstream circuits will ensure

a stable frequency and phase relationship between

the data coming into and leaving the S3005 device.

The MODE[2:0] inputs select the output serial clock

frequency to be 622.08 MHz for STS-12, 311.04

MHz for CMI-encoded STS-3, 155.52 MHz for STS-

3, or 278.528 MHz for CMI-encoded E4. Their

frequencies are selected as shown in Table 2.

The REFSEL[1:0] inputs in combination with the

MODE[2:0] inputs select the ratio between the out-

put clock frequency and the reference input

frequency, as shown in Tables 3 and 4. This ratio is

adjusted for each of the four modes so that the refer-

ence frequency selected by the REFSEL[1:0] is the

same for all modes.

Table 3. Reference Frequency Options

REFSEL

[1:0]

REFERENCE CLOCK

FREQUENCY

19.44 MHz

OPERATING

MODE

STS–12,STS–3

38.88 MHz

51.84 MHz

77.76 MHz

STS–12,STS–3

STS–12

The REFCLK input must be generated from a differ-

ential ECL crystal oscillator which has a frequency

accuracy of better than 20 ppm in order for the

TSCLK frequency to have the same accuracy re-

quired for operation in a SONET system.

Table 4. E4CMI Reference Frequency Options

In order to meet the .01 UI SONET jitter specifications,

the maximum reference clock jitter must be guaran-

teed over the 12KHz to 1MHz bandwidth. For details

of reference clock jitter requirements, see Table 5.

REFSEL

[1:0]

REFERENCE CLOCK

FREQUENCY

OPERATING

MODE

—

17.408 MHz

34.816 MHz

46.421 MHz

69.632 MHz

—

The on–chip PLL consists of a phase detector, which

compares the phase relationship between the VCO

output and the REFCLK input, a loop filter which

converts the phase detector output into a smooth DC

voltage, and a VCO, whose frequency is varied by

this voltage.

Table 5. Reference Jitter Limits

The loop filter generates a VCO control voltage based

on the average DC level of the phase discriminator

output pulses. The loop filter’s corner frequency is

optimized to minimize output phase jitter. The loop

filter capacitor is included on the package.

Maximum Reference Clock Jitter

in 12 KHz to 1 MHz Band

Operating

Mode

14 ps

28 ps

56 ps

STS–12

STS–3 CMI

STS–3

Table 2. Clock Frequency Options

OUTPUT CLOCK

FREQUENCY

OPERATING

MODE

MODE[2:0]

100

001

010

011

622.08 MHz

311.04 MHz

155.52 MHz

278.528 MHz

STS–12

STS–3 CMI

STS–3

E4 CMI

Applied Micro Circuits Corporation

6195 Lusk Blvd., San Diego, CA 92121 • (619) 450-9333

1 2 3 456 7 8...28

中文翻译

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与S3005B-6相关器件

型号	品牌	获取价格	描述	数据表
S3005C1	AMCC	获取价格	ATM/SONET/SDH Transmitter, 1-Func, CQFP68, 0.050 INCH PITCH, CERAMIC, LDCC-68
S3005C-1	AMCC	获取价格	TRANSCEIVER, CQFP68, CERAMIC, LDCC-68
S3005C6	AMCC	获取价格	ATM/SONET/SDH Transmitter, 1-Func, CQFP68, 0.050 INCH PITCH, CERAMIC, LDCC-68
S3005D1	AMCC	获取价格	ATM/SONET/SDH Transmitter, 1-Func, PQFP80, 0.025 INCH PITCH, HEAT SINK, PLASTIC, QFP-80
S3005D-1	AMCC	获取价格	TRANSCEIVER, PQFP80, HEAT SINK, PLASTIC, QFP-80
S3005D6	AMCC	获取价格	ATM/SONET/SDH Transmitter, 1-Func, PQFP80, 0.025 INCH PITCH, HEAT SINK, PLASTIC, QFP-80
S3005D-6	AMCC	获取价格	TRANSCEIVER, PQFP80, HEAT SINK, PLASTIC, QFP-80
S3006A1	AMCC	获取价格	ATM/SONET/SDH Receiver, 1-Func, CQFP68, 0.050 INCH PITCH, CERAMIC, LDCC-68
S3006A-1	AMCC	获取价格	TRANSCEIVER, CQFP68, CERAMIC, LDCC-68
S3006A6	AMCC	获取价格	ATM/SONET/SDH Receiver, 1-Func, CQFP68, 0.050 INCH PITCH, CERAMIC, LDCC-68

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