Datasheet > S3005B-6

S3005B-6

更新时间： 2024-01-22 04:21:16

品牌	Logo	应用领域
AMCC		电信电信集成电路
页数	文件大小	规格书
28页	280K
描述
TRANSCEIVER, UUC, DIE

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中文翻译

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技术参数
数据手册

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S3005B-6 技术参数

生命周期：	Obsolete	零件包装代码：	DIE
包装说明：	DIE,	Reach Compliance Code：	unknown
风险等级：	5.82	JESD-30 代码：	X-XUUC-N
负电源额定电压：	-4.5 V	功能数量：	1
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	DIE
封装形状：	UNSPECIFIED	封装形式：	UNCASED CHIP
认证状态：	Not Qualified	标称供电电压：	5 V
表面贴装：	YES	电信集成电路类型：	TRANSCEIVER
温度等级：	INDUSTRIAL	端子形式：	NO LEAD
端子位置：	UPPER	Base Number Matches：	1

S3005B-6 数据手册

SONET/SDH OC-3/12 TRANSMITTER AND RECEIVER

S3005/S3006

For applications that provide a high-frequency bit

clock externally, the internal synthesizer may be by-

passed. Reference frequencies of 19.44 MHz, 38.88

MHz, 51.84 MHz, or 77.76 MHz are selectable for

SONET/SDH by the two reference select input pins.

In E4 applications, these same pins can select the

reference frequency from 17.408 MHz, 34.816 MHz,

46.421 MHz, or 69.632 MHz.

S3005 TRANSMITTER FUNCTIONAL

DESCRIPTION

The S3005 SETI transmitter chip performs the serial-

izing stage in the processing of a transmit SONET

STS-12, STS-3, or ITU-T E4 bit serial data stream. It

converts the byte serial data stream to bit serial for-

mat at 622.08, 155.52, or 139.264 Mbit/s depending

on the control settings and reference frequency pro-

vided by the user. A Coded-Mark-Inversion (CMI) is

available for use during 155.52 Mbit/s STS-3 (electri-

cal) and 139.264 Mbit/s E4 operational modes. (See

Other Operating Modes.)

Loopback modes are provided for diagnostic

loopback (transmitter to receiver), or line loopback

(receiver to transmitter) when used with the compat-

ible S3006. (See Other Operating Modes.)

The operating mode is selected by three mode pro-

gramming inputs to be 622.08 Mbit/s, 155.52 Mbit/s,

155.52 Mbit/s with Coded-Mark-Inversion (CMI) en-

coding, or 139.264 Mbit/s with CMI encoding.

A high-frequency bit clock can be generated from a

variety of lower frequency references by using the

integral frequency synthesizer consisting of a phase-

locked loop circuit with an adjustable divider in the loop.

Figure 5. SONET/SDH Receiver Functional Block Diagram

LCV

LOS

1:8 SERIAL

POUT[7:0]

TO PARALLEL

TIMING

GEN

OOF

POCLK

FRAME

BYTE

DETECT

DLEB

RSDP/N

DLDP/N

BACKUP

REFERENCE

GEN

BYTCLKIP

REFCLKP/N

REFSEL[1:0]

MODE[2:0]

LLDP/N

CLOCK

RECOVERY

LLCLKP/N

LOCKDET

TESTEN

RSTB

TESTRST

Applied Micro Circuits Corporation

6195 Lusk Blvd., San Diego, CA 92121 • (619) 450-9333

1 2 345 6 7...28

中文翻译

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与S3005B-6相关器件

型号	品牌	获取价格	描述	数据表
S3005C1	AMCC	获取价格	ATM/SONET/SDH Transmitter, 1-Func, CQFP68, 0.050 INCH PITCH, CERAMIC, LDCC-68
S3005C-1	AMCC	获取价格	TRANSCEIVER, CQFP68, CERAMIC, LDCC-68
S3005C6	AMCC	获取价格	ATM/SONET/SDH Transmitter, 1-Func, CQFP68, 0.050 INCH PITCH, CERAMIC, LDCC-68
S3005D1	AMCC	获取价格	ATM/SONET/SDH Transmitter, 1-Func, PQFP80, 0.025 INCH PITCH, HEAT SINK, PLASTIC, QFP-80
S3005D-1	AMCC	获取价格	TRANSCEIVER, PQFP80, HEAT SINK, PLASTIC, QFP-80
S3005D6	AMCC	获取价格	ATM/SONET/SDH Transmitter, 1-Func, PQFP80, 0.025 INCH PITCH, HEAT SINK, PLASTIC, QFP-80
S3005D-6	AMCC	获取价格	TRANSCEIVER, PQFP80, HEAT SINK, PLASTIC, QFP-80
S3006A1	AMCC	获取价格	ATM/SONET/SDH Receiver, 1-Func, CQFP68, 0.050 INCH PITCH, CERAMIC, LDCC-68
S3006A-1	AMCC	获取价格	TRANSCEIVER, CQFP68, CERAMIC, LDCC-68
S3006A6	AMCC	获取价格	ATM/SONET/SDH Receiver, 1-Func, CQFP68, 0.050 INCH PITCH, CERAMIC, LDCC-68

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