Datasheet > S2S65A00

S2S65A00

更新时间： 2024-11-29 20:07:11

品牌	Logo	应用领域
精工 - SEIKO		商用集成电路
页数	文件大小	规格书
2页	136K
描述
Consumer Circuit, FBGA-280

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S2S65A00 数据手册

S2S65A00

Drive Recorder IC

Dual Camera Controller with JPEG Encoder

DESCRIPTION

S2S65A00 is an image controller IC that supports the optimum dual camera for applications such as drive recorder and

vehicle-mounted camera. It has camera interfaces and JPEG encoder functions, as well as CF, SD memory, USB

(device) interfaces, and embedded 8-ch ADC. A drive recorder or a vehicle-mounted camera set can easily be configured

by connecting S2S65A00 with camera modules, SDRAM, an external storage (CF or SD memory card), and Flash ROM

containing firmware. In addition, S2S65A00 is equipped with GPIO and I²C bus, which enable you to configure cameras

and control external devices.

FEATURES

z One-chip solution, which enables you to construct system at low cost.

z Provides JPEG encoding by using 30 fps @VGA hardware (ISO 10918 compliant).

z Up to two camera modules can be connected.

z Each camera module has two hardware JPEG encoders.

z Provides moving-object detection function to support motion detection.

z Supports I²S for voice data.

z Has Compact Flash interface that supports CF Memory Cards.

z Has Compact Flash interface that supports wireless LAN interface (802.11b/g).

z Has SD memory interface that supports SD memory card connection.

z ARM720T Rev 4.3 is built-in (with 8KB cache) 50MHz

z Incorporated USB 2.0-HS (Device) function enables the connection with PC.

z Embedded 8-ch ADC enables the connection with various analog sensors.

z Equipped with the timer for event counter.

z Memory bus: 2 ports (16bit-Bus: FROM/SRAM, 32bit-Bus: SDRAM).

SPECIFICATIONS

Camera/JPEG Encoder

8-bit parallel interface × 2 ports

2 camera modules can be connected

Camera interface

Pixel clock frequency for inputting camera data is less than 2/3 of CPU clock

frequency.

Resolution

VGA, QVGA, CIF, and QCIF

Hardware encoder × 2

JPEG encoder

Processing power of 30 fps @VGA or more (when 1 camera module connected).

YUV4:2:2 progressive (both ports)

Camera input data format

Built-in memory

For CPU Work/JPEG processing: Up to 56KB (32KB max. for CPU Work)

External Storage

Compact Flash Card

interface

Complies with CF+ spec. Rev.1.4. Also supports True IDE mode.

Complies with SD Memory Card Physical Layer Spec.ver.1.0. Supports 1-bit/4-bit

interface.

SD Memory interface

Others

Moving object detection

General-purpose I/O

Serial EEPROM interface

Serial interface

I²C bus

Detects 4 × 4 area of an image.

82 pcs (at max.)

Clock synchronous

UART: Software compatible with 16550 × 3 channels

Master (for camera control or general-purpose)

For input/output of voice/audio

I²S bus

USB 2.0-HS (Device)

ADC

For communication with PC

Ch:8/ Resolution: 10bit/ ConversionTime:10us

UP to 16MB (Static memory available: up to 16MB)

SDRAM 2 – 256MB (separated from SRAM-BUS)

1.8V (core), 3.3V (I/O), 2.4-3.6V (camera I/O)

PFBGA-280 pin (PFBGA16U-280:16 ×16 × 1.2 mm, 0.8mm ball pitch)

External Flash ROM

Expandable memory

Supply voltage

Package

SEIKO EPSON CORPORATION

中文翻译

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与S2S65A00相关器件

型号	品牌	获取价格	描述	数据表
S2S65A00B	SEIKO	获取价格	USB Bus Controller,
S2S65A00B00A000	EPSON	获取价格	One-chip solution, which can reduce system cost.
S2S65A30	EPSON	获取价格	One-chip solution, which can reduce system cost.
S2S65P10	SEIKO	获取价格	SPECIALTY CONSUMER CIRCUIT, PQFP100, 0.50 MM PITCH, QFP15-100
S2S6M	SHINDENGEN	获取价格	Schottky Rectifiers (SBD) (60V 1.3A)
S2SA1774G	ONSEMI	获取价格	PNP Silicon General Purpose Amplifier Transistor
S2SC4617G	ONSEMI	获取价格	NPN 双极晶体管
S2SD-02-26-L-22.00-DR-NDX	SAMTEC	获取价格	Cable Assembly, 26AWG,
S2SD-02-28-L-78.74-D-NDX	SAMTEC	获取价格	Cable Assembly, 28AWG,
S2SD-02-28-L-78.74-DR-NDX	SAMTEC	获取价格	Cable Assembly, 28AWG,

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