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S25FL127SABMFI103 PDF预览

S25FL127SABMFI103

更新时间: 2024-11-08 19:54:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管内存集成电路
页数 文件大小 规格书
142页 2486K
描述
Flash, 16MX8, PDSO8, SOIC-8

S25FL127SABMFI103 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:SOP, SOP8,.3Reach Compliance Code:compliant
HTS代码:8542.32.00.51风险等级:1.6
其他特性:IT ALSO HAVE MEMORY WIDTH X 1备用内存宽度:2
最大时钟频率 (fCLK):108 MHz数据保留时间-最小值:20
耐久性:100000 Write/Erase CyclesJESD-30 代码:S-PDSO-G8
长度:5.283 mm内存密度:134217728 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1端子数量:8
字数:16777216 words字数代码:16000000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:16MX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.3封装形状:SQUARE
封装形式:SMALL OUTLINE并行/串行:SERIAL
电源:3/3.3 V编程电压:3 V
认证状态:Not Qualified座面最大高度:2.159 mm
串行总线类型:SPI最大待机电流:0.0001 A
子类别:Flash Memories最大压摆率:0.063 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL类型:NOR TYPE
宽度:5.283 mm写保护:HARDWARE/SOFTWARE
Base Number Matches:1

S25FL127SABMFI103 数据手册

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S25FL127S  
128-Mbit (16 Mbyte)  
3.0 V SPI Flash Memory  
Features  
CMOS 3.0 Volt Core  
Density  
Cycling Endurance  
– 100,000 Program-Erase Cycles per sector, minimum  
Data Retention  
– 128 Mbits (16 Mbytes)  
Serial Peripheral Interface (SPI) with Multi-I/O  
– SPI Clock polarity and phase modes 0 and 3  
– Extended Addressing: 24- or 32-bit address options  
– Serial Command set and footprint compatible with  
S25FL-A,  
– 20 Year Data Retention, minimum  
Security features  
– One Time Program (OTP) array of 1024 bytes  
– Block Protection:  
– Status Register bits to control protection against  
program or erase of a contiguous range of sectors.  
– Hardware and software control options  
– Advanced Sector Protection (ASP)  
– Individual sector protection controlled by boot code or  
password  
S25FL-K, and S25FL-P SPI families  
– Multi I/O Command set and footprint compatible with  
S25FL-P SPI family  
READ Commands  
– Normal, Fast, Dual, Quad  
– AutoBoot - power up or reset and execute a Normal or  
Quad read command automatically at a preselected  
address  
– Common Flash Interface (CFI) data for configuration  
information.  
Cypress 65 nm MirrorBit Technology with Eclipse  
Architecture  
Supply Voltage: 2.7V to 3.6V  
Temperature Range:  
– Industrial (-40°C to +85°C)  
Programming (0.8 Mbytes/s)  
– Industrial Plus (-40°C to +105°C)  
– Automotive AEC-Q100 Grade 3 (-40°C to +85°C)  
– Automotive AEC-Q100 Grade 2 (-40°C to +105°C)  
– 256- or 512-byte Page Programming buffer options  
– Quad-Input Page Programming (QPP) for slow clock  
systems  
– Automatic ECC -internal hardware Error Correction Code  
generation with single bit error correction  
Packages (all Pb-free)  
– 8-lead SOIC (208 mil)  
– 16-lead SOIC (300 mil)  
– 8-contact WSON 6 x 5 mm  
– BGA-24 6 x 8 mm  
– 5 x 5 ball (FAB024) and 4 x 6 ball (FAC024) footprint  
options  
– Known Good Die and Known Tested Die  
Erase (0.5 Mbytes/s)  
– Hybrid sector size option - physical set of sixteen 4-kbyte  
sectors at top or bottom of address space with all  
remaining sectors of 64 kbytes  
– Uniform sector option - always erase 256-kbyte blocks for  
software compatibility with higher density and future  
devices.  
Cypress Semiconductor Corporation  
Document Number: 001-98282 Rev. *I  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised June 08, 2017