Datasheet > RTQ2536-QA

RTQ2536-QA

更新时间： 2024-02-02 18:49:45

品牌	Logo	应用领域
立锜 - RICHTEK		双倍数据速率
页数	文件大小	规格书
11页	206K
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技术参数
数据手册

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RTQ2536-QA 技术参数

Status：	Active	Memory Supported：	DDRI;DDRII;DDRIII;DDRIV
Vin (min) (V)：	1	Vin (max) (V)：	3.5
VTT Output Tolerance (max) (+/- mV)：	30	Isource/Isink (max) (A)：	2
Standby Current (typ) (mA)：	0.5	Current Limit (typ) (A)：	2
Features：	Enable Input;OCP;Stable with Ceramic Capacitor	Package Type：	WDFN3x3-10S

RTQ2536-QA 数据手册

RTQ2536-QA

Pin Configuration

(TOP VIEW)

VDDQSNS

VIN

VCNTL

GND

VOUT

PGND

SENSE

REFOUT

WDFN-10SL 3x3

Functional Pin Description

Pin No.

Pin Name

Pin Function

VDDQSNS Reference input.

VIN

Power input of the regulator.

Power output of the regulator.

Power ground of the regulator.

VOUT

PGND

Voltage sense input for the regulator. Connect to positive terminal of the output

capacitor or the load.

SENSE

REFOUT

Reference output. Connect to GND through a 0.1F ceramic capacitor.

S3 signal input.

S5 signal input.

Control voltage input. Connect this pin to the 3.3V or 5V power supply. A

ceramic decoupling capacitor with a value 4.7F is required.

VCNTL

GND

Analog ground. Connect to negative terminal of the output capacitor.

Exposed pad. The exposed pad is internally unconnected and must be

soldered to a large PGND plane. Connect this PGND plane to other layers with

thermal vias to help dissipate heat from the device.

11 (Exposed Pad) PAD

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

DSQ2536-QA-01 September 2018

123 4 5 6 7...11

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