Datasheet > RK80532PC064512

RK80532PC064512

更新时间： 2024-01-18 09:01:38

品牌	Logo	应用领域
其他 - ETC		外围集成电路微处理器时钟
页数	文件大小	规格书
85页	1952K
描述
Microprocessor

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技术参数
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RK80532PC064512 技术参数

生命周期：	Active	零件包装代码：	PGA
包装说明：	SPGA,	针数：	478
Reach Compliance Code：	unknown	风险等级：	5.76
Is Samacsys：	N	地址总线宽度：	36
位大小：	32	边界扫描：	YES
最大时钟频率：	200 MHz	外部数据总线宽度：	64
格式：	FLOATING POINT	集成缓存：	YES
JESD-30 代码：	S-CPGA-P478	长度：	35 mm
低功率模式：	YES	端子数量：	478
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装代码：	SPGA
封装形状：	SQUARE	封装形式：	GRID ARRAY, SHRINK PITCH
认证状态：	COMMERCIAL	速度：	2600 MHz
最大供电电压：	1.4 V	最小供电电压：	1.32 V
表面贴装：	NO	端子面层：	NOT SPECIFIED
端子形式：	PIN/PEG	端子节距：	1.27 mm
端子位置：	PERPENDICULAR	宽度：	35 mm
uPs/uCs/外围集成电路类型：	MICROPROCESSOR	Base Number Matches：	1

RK80532PC064512 数据手册

Introduction

1.0

Introduction

The Intel^®Pentium^®4 processor with 512-KB L2 cache on 0.13 micron process is a follow

on to the Pentium 4 processor in the 478-pin package with Intel^®NetBurst^™

microarchitecture. The Pentium 4 processor with 512-KB L2 cache on 0.13 micron

process utilizes Flip-Chip Pin Grid Array (FC-PGA2) package technology, and plugs into a

478-pin surface mount, Zero Insertion Force (ZIF) socket, referred to as the mPGA478B

socket. The Pentium 4 processor with 512-KB L2 cache on 0.13 micron process, like its

predecessor, the Pentium 4 processor in the 478-pin package, is based on the same Intel

32-bit microarchitecture and maintains the tradition of compatibility with IA-32 software. In

this document, the Pentium 4 processor with 512-KB L2 cache on 0.13 micron process

will be referred to as the “Pentium 4 processor with 512-KB L2 cache on 0.13 micron

process,” or simply “the processor.”

The Intel NetBurst microarchitecture features include hyper pipelined technology, a rapid

execution engine, a 400-MHz or a 533-MHz system bus, and an execution trace cache.

The hyper pipelined technology doubles the pipeline depth in the Pentium 4 processor

with 512-KB L2 cache on 0.13 micron process, allowing the processor to reach much

higher core frequencies. The rapid execution engine allows the two integer ALUs in the

processor to run at twice the core frequency, which allows many integer instructions to

execute in 1/2 clock tick. The 400-MHz or 533-MHz system bus is a quad-pumped bus

running off a 100-MHz or a 133-MHz system clock making 3.2 Gbytes/sec and

4.3 Gbytes/sec data transfer rates possible. The execution trace cache is a first-level

cache that stores approximately 12-k decoded micro-operations, which removes the

instruction decoding logic from the main execution path, thereby increasing performance.

Additional features within the Intel NetBurst microarchitecture include advanced dynamic

execution, advanced transfer cache, enhanced floating point and multi-media unit, and

Streaming SIMD Extensions 2 (SSE2). The advanced dynamic execution improves

speculative execution and branch prediction internal to the processor. The advanced

transfer cache is a 512 KB, on-die level 2 (L2) cache. A new floating point and multi media

unit has been implemented which provides superior performance for multi-media and

mathematically intensive applications. Finally, SSE2 adds 144 new instructions for

double-precision floating point, SIMD integer, and memory management. Power

management capabilities such as AutoHALT, Stop-Grant, Sleep, and Deep Sleep have

been retained.

The Streaming SIMD Extensions 2 (SSE2) enable break-through levels of performance in

multimedia applications including 3-D graphics, video decoding/encoding, and speech

recognition. The new packed double-precision floating-point instructions enhance

performance for applications that require greater range and precision, including scientific

and engineering applications and advanced 3-D geometry techniques, such as ray

tracing.

The Pentium 4 processor with 512-KB L2 cache on 0.13 micron process Intel NetBurst

microarchitecture system bus utilizes a split-transaction, deferred reply protocol like the

Pentium 4 processor. This system bus is not compatible with the P6 processor family bus.

The Intel NetBurst microarchitecture system bus uses Source-Synchronous Transfer

(SST) of address and data to improve performance by transferring data four times per bus

clock (4X data transfer rate, as in AGP 4X). Along with the 4X data bus, the address bus

can deliver addresses two times per bus clock and is referred to as a “double-clocked” or

2X address bus. Working together, the 4X data bus and 2X address bus provide a data

bus bandwidth of up to 4.3 Gbytes/second.

Datasheet

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与RK80532PC064512相关器件

型号	品牌	获取价格	描述	数据表
RK80532PC064512/SL6PP	INTEL	获取价格	RISC Microprocessor, 32-Bit, 2600MHz, CMOS, CPGA478
RK80532PC064512/SL6QR	INTEL	获取价格	RISC Microprocessor, 32-Bit, 2600MHz, CMOS, CPGA478
RK80532PC064512/SL6SB	INTEL	获取价格	RISC Microprocessor, 32-Bit, 2600MHz, CMOS, CPGA478
RK80532PE051512/SL683	INTEL	获取价格	RISC Microprocessor, 32-Bit, 2260MHz, CMOS, CPGA478
RK80532PE051512/SL6ET	INTEL	获取价格	RISC Microprocessor, 32-Bit, 2260MHz, CMOS, CPGA478
RK80532PE051512/SL7V9	INTEL	获取价格	RISC Microprocessor, 32-Bit, 2260MHz, CMOS, CPGA478
RK80532PE056512	ETC	获取价格	Microprocessor
RK80532PE056512/SL67Z	INTEL	获取价格	RISC Microprocessor, 32-Bit, 2400MHz, CMOS, CPGA478
RK80532PE056512/SL6PC	INTEL	获取价格	RISC Microprocessor, 32-Bit, 2400MHz, CMOS, CPGA478
RK80532PE056512/SL6RZ	INTEL	获取价格	RISC Microprocessor, 32-Bit, 2400MHz, CMOS, CPGA478

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